R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 371

• Manufacturer Part Number: R5F21324CNSP#U0
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Cr

Specifications of R5F21324CNSP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 342 of 573
Figure 22.13
SDA2
SCL2
IICM: Bit in U2SMR register
IICM2, SWC, SWC2, SDHI: Bits in U2SMR2 register
STSPSEL, ACKD, ACKC: Bits in U2SMR4 register
The above applies when:
Note:
• Bits SMD2 to SMD0 in U2MR register = 010b
• IICM bit in U2SMR register = 1
If the IICM bit is set to 1, the pin can be read even when the port direction bit corresponding to the SCL2 pin is set to 1 (output mode).
Noise
filter
Noise
filter
ACKC = 1
I
2
Delay
circuit
C Mode Block Diagram
IICM = 0
IICM = 1
ACKD bit
UART2
STSPSEL = 0
I/O port
Start condition
detection
Stop condition
detection
STSPSEL = 1
STSPSEL = 0
ACKC = 0
STSPSEL
Q
R
= 1
SDHI
Port register
Internal clock
External
clock
SWC2
R
S
(1)
S
R
CLK
control
Start/stop condition generation block
Q
SDA (STSP)
SCL (STSP)
9th bit falling edge
Transmit
register
Bus
busy
UART2
UART2
Receive
register
UART2
SWC
9th bit
D
D
T
T
Q
Q
IICM2 = 1
ACK
IICM = 1 and
IICM2 = 0
IICM2 = 1
IICM = 1 and
IICM2 = 0
NACK
22. Serial Interface (UART2)
DTC request
(source number 15)
UART2 transmit/NACK
interrupt request
UART2 receive/ACK
interrupt request
DTC request
(source number 14)
Start/stop condition detection
interrupt request