R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 377

• Manufacturer Part Number: R5F21324CNSP#U0
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Cr

Specifications of R5F21324CNSP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 348 of 573
Figure 22.16
22.5.2
Table 22.13
Output of pins SCL2
and SDA2
Start/stop condition
interrupt request
generation timing
A start condition is generated by setting the STAREQ bit in the U2SMR4 register to 1 (start).
A restart condition is generated by setting the RSTAREQ bit in the U2SMR4 register to 1 (start).
A stop condition is generated by setting the STPREQ bit in the U2SMR4 register to 1 (start).
The output procedure is as follows:
(1) Set the STAREQ bit, RSTAREQ bit or STPREQ bit to 1 (start).
(2) Set the STSPSEL bit in the U2SMR4 register to 1 (output).
Table 22.13 lists the STSPSEL Bit Functions. Figure 22.16 shows the STSPSEL Bit Functions.
(1) Slave Mode
STSPSEL bit
SCL2
SDA2
STSPSEL bit
SCL2
SDA2
Function
(2) Master Mode
CKDIR = 1 (external clock)
Output of Start and Stop Conditions
CKDIR = 0 (internal clock), CKPH = 1 (with clock delay)
STSPSEL Bit Functions
STSPSEL Bit Functions
Set STAREQ = 1
0
Start condition
detection interrupt
Output of transfer clock and data
Output of start/stop conditions is
accomplished by a program using ports
(not automatically generated in
hardware)
Detection of start/stop conditions
Set to 1 by
a program.
(start)
Start condition detection
interrupt
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
Set to 0 by
a program.
STSPSEL = 0
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
Set STPREQ = 1
Stop condition
detection interrupt
Output of start/stop conditions
according to bits STAREQ,
RSTAREQ, and STPREQ
Completion of start/stop condition
generation
(start)
Set to 1 by
a program.
Stop condition detection
interrupt
STSPSEL = 1
22. Serial Interface (UART2)
Set to 0 by
a program.