R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 384

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 355 of 573
Figure 22.20
22.6.2
(1)
(2)
(3)
(4)
(5)
Figure 22.20 shows a Sample Flowchart of Multiprocessor Data Reception. When the MPIE bit in the U2SMR5
register is set to 1, communication data is ignored until data in which the multiprocessor bit is 1 is received.
Communication data with a 1 multiprocessor bit added is transferred to the U2RB register as receive data. At
this time, a reception complete interrupt request is generated. Other operations are the same as in universal
asynchronous receiver/transmitter mode (UART mode). Figure 22.21 shows a Receive Operation Example
during Multiprocessor Communication (with 8-Bit Data/Multiprocessor Bit/One-Stop Bit).
Read the RI bit in the U2C1 register
Read the RI bit in the U2C1 register
Multiprocessor Reception
in the U2SMR5 register to 1
in the receive shift register
in the U2C1 register to 0
Sample Flowchart of Multiprocessor Data Reception
in the U2RB register
Read receive data
Set the MPIE bit
data reception?
Own station ID?
Set the RE bit
Read data
Continue
RI = 1?
RI = 1?
Start
End
Yes
Yes
Yes
No
Yes
No
No
No
(1) Set the MPIE bit in the U2SMR5 register to 1.
(2) When the MPRB bit is detected to be 1, the
(3) When the data matches the own station ID, the
(4) Read the U2C1 register to confirm that the RI
(5) To discontinue reception, set the RE bit in the
To continue reception, restart the procedure
MPIE bit is set to 0 and a reception complete
interrupt request can be generated.
Read the U2C1 register to confirm that the RI
bit is set to 1. If the RI bit is 1, read data in the
receive shift register and compare the data with
its own station ID. Reading data in the U2RB
register sets the RI bit to 0 automatically.
next data reception starts. When the data does
not match the ID, set the MPIE bit to 1 and the
MCU enters the idle state.
bit is set to 1. Then read data in the receive
shift register.
U2C0 register to 0 to complete reception.
from step (1).
22. Serial Interface (UART2)

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