R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 438

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 409 of 573
Figure 25.5
Figure 25.6
Program processing (2) Instruction for
Program processing
TDRE bit in ICSR
TEND bit in ICSR
(master output)
(master output)
ICDRS register
ICDRT register
(slave output)
ICSR register
ICSR register
(master output)
(master output)
ICDRT register
ICDRS register
TDRE bit in
TEND bit in
(slave output)
register
register
SDA
SDA
SCL
Operating Timing in Master Transmit Mode (I
Operating Timing in Master Transmit Mode (I
SDA
SDA
SCL
(3) Write data to ICDRT register.
start condition
generation
9
A
b7
1
b7
1
b6
(3) Write data to ICDRT register
2
(1st byte).
b6
2
b5
3
b5
Slave address
3
Address + R/W
b4
4
b4
4
Address + R/W
Data n
b3
5
Data n
b3
5
b2
(4) Write data to ICDRT register
6
(2nd byte).
b2
6
b1
7
2
2
C bus Interface Mode) (1)
C bus Interface Mode) (2)
b1
7
b0
R/W
8
(6) Generate a stop condition
b0
and set TEND bit to 0.
8
A
9
A/A
(5) Write data to ICDRT register
9
(7) Set to slave receive mode.
(3rd byte).
Data 1
Data 1
b7
1
25. I
Data 2
2
b6
C bus Interface
2

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