R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 482

• Manufacturer Part Number: R5F21324CNSP#U0
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Cr

Specifications of R5F21324CNSP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 453 of 573
Figure 27.4
27.3.3
27.3.3.1
27.3.3.2
A software trigger, trigger from timer RC, and external trigger are used as A/D conversion start triggers.
Figure 27.4 shows the Block Diagram of A/D Conversion Start Control Unit.
A software trigger is selected when bits ADCAP1 to ADCAP0 in the ADMOD register are set to 00b (software
trigger).
The A/D conversion starts when the ADST bit in the ADCON0 register is set to 1 (A/D conversion starts).
This trigger is selected when bits ADCAP1 to ADCAP0 in the ADMOD register are set to 10b (timer RC).
To use this function, make sure the following conditions are met.
•
•
•
•
When the IMFj bit in the TRCSR register is changed from 0 to 1, A/D conversion starts.
Refer to 19. Timer RC, 19.5 Timer Mode (Output Compare Function), 19.6 PWM Mode, 19.7 PWM2
Mode for the details of timer RC and the output compare function (timer mode, PWM mode, and PWM2
mode).
Bits ADCAP1 to ADCAP0 in the ADMOD register are set to 10b (timer RC).
Timer RC is used in the output compare function (timer mode, PWM mode, PWM2 mode).
The ADTRGjE bit (j = A, B, C, D) in the TRCADCR register is set to 1 (A/D trigger occurs at compare match
with TRCGRj register).
The ADST bit in the ADCON0 register is set to 1 (A/D conversion starts).
(TRCSR register)
A/D Conversion Start Condition
ADTRG pin
j = A, B, C, D k = 0 to 1
ADCAP1 to ADCAP0: Bits in ADMOD register
ADST: Bit in ADCON0 register
ADTRGjE: Bit in TRCADCR register
INT0EN: Bit in INTEN register
IMFj: Bit in TRCSR register
PD4_5: Bit in PD4 register
Note:
Block Diagram of A/D Conversion Start Control Unit
Software Trigger
Trigger from Timer RC
PD4_5
1. Do not set bits ADCAP1 to ADCAP0 to 01b.
IMFj
ADTRGjE
INT0EN
ADST
ADCAP1 to ADCAP0
= 00b
= 10b
= 11b
A/D conversion start trigger
(1)
27. A/D Converter