R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 544

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 515 of 573
Figure 30.3
30.2.11 Low-Current-Consumption Read Mode
Notes:
In low-speed clock mode and low-speed on-chip oscillator mode, the current consumption when reading the
flash memory can be reduced by setting the FMR27 bit in the FMR2 register to 1 (low-current-consumption
read mode enabled).
Low-current-consumption read mode can be used when the CPU clock is set to either of the following:
However, do not use low-current-consumption read mode when the frequency of the selected CPU clock is
3 kHz or below.
After setting the divide ratio of the CPU clock, set the FMR27 bit to 1 (low-current-consumption read mode
enabled).
Enter wait mode or stop mode after setting the FMR27 bit to 0 (low-current-consumption read mode disabled).
Do not enter wait mode or stop mode while the FMR27 bit is 1 (low-current-consumption read mode enabled).
Figure 30.3 shows the Handling Procedure Example of Low-Current-Consumption Read Mode.
FMR27: Bit in FMR2 register
The CPU clock is set to the low-speed on-chip oscillator clock divided by 4, 8, or 16.
The CPU clock is set to the XCIN clock divided by 1 (no division), 2, 4, or 8.
1. To set the FMR27 bit to 1, first write 0 and then write 1 immediately.
2. In low-current-consumption read mode, set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled).
Disable interrupts and DTC activation between writing 0 and writing 1.
Enter wait mode or stop mode after setting the FMR27 bit to 0 (low-current-consumption read mode disabled).
Do not enter wait mode or stop mode while the FMR27 bit is 1 (low-current-consumption read mode enabled).
Handling Procedure Example of Low-Current-Consumption Read Mode
Step (1)
Step (2)
Step (3)
Step (4)
Step (5)
Step (6)
Step (7)
Step (8)
(low-current-consumption read mode enabled)
(Wait until the high-speed on-chip oscillator clock
(low-current-consumption read mode disabled)
Enter low-current-consumption read mode
Stop the high-speed on-chip oscillator clock
Start the high-speed on-chip oscillator clock
Enter high-speed on-chip oscillator mode
low-current-consumption read mode
low-speed on-chip oscillator mode
Handling procedure for enabling
Enter low-speed clock mode or
oscillation stabilizes)
by FMR27 bit
FMR27 ← 1
FMR27 ← 0
(2)
(1)
30. Reducing Power Consumption

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