R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 586

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 557 of 573
32.9.3
In real-time clock mode, read registers TRESEC, TREMIN, TREHR, and TREWK when time data is updated
and read the PM bit in the TRECR1 register when the BSY bit is set to 0 (not while data is updated).
Also, when reading several registers, an incorrect time will be read if data is updated before another register is
read after reading any register.
In order to prevent this, use the reading procedure shown below.
(1) Monitor the BSY bit.
(2) Monitor until the BSY bit is set to 0 after the BSY bit is set to 1 (approximately 62.5 ms while the BSY bit
(3) Read necessary contents of registers TRESEC, TREMIN, TREHR, and TREWK and the PM bit in the
(1) Read necessary contents of registers TRESEC, TREMIN, TREHR, and TREWK and the PM bit in the
(2) Read the same register as (1) and compare the contents.
(3) Recognize as the correct value if the contents match. If the contents do not match, repeat until the read
Using an interrupt
Read necessary contents of registers TRESEC, TREMIN, TREHR, and TREWK and the PM bit in the
TRECR1 register in the timer RE interrupt routine.
Monitoring with a program 1
Monitor the IR bit in the TREIC register with a program and read necessary contents of registers TRESEC,
TREMIN, TREHR, and TREWK and the PM bit in the TRECR1 register after the IR bit in the TREIC register
is set to 1 (timer RE interrupt request generated).
Monitoring with a program 2
Using read results if they are the same value twice
Also, when reading several registers, read them as continuously as possible.
is set to 1).
TRECR1 register after the BSY bit is set to 0.
TRECR1 register.
contents match with the previous contents.
Time Reading Procedure of Real-Time Clock Mode
32. Usage Notes

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