R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 592

• Manufacturer Part Number: R5F21324CNSP#U0
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Cr

Specifications of R5F21324CNSP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 563 of 573
Table 32.2
FMR21, FMR22: Bits in FMR2 register
Note:
EW0
Mode
1. Do not use a non-maskable interrupt while block 0 is being auto-erased because the fixed vector is allocated in block 0.
Data flash During auto-erasure
Program
ROM
Erase/
Target
Write
CPU Rewrite Mode Interrupts (2)
(suspend enabled)
During auto-erasure
(suspend disabled
During
auto-programming
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled)
During
auto-programming
or FMR22 = 0)
Status
• Watchdog Timer
• Oscillation Stop Detection
• Voltage Monitor 2
• Voltage Monitor 1
• NMI
When an interrupt request is acknowledged,
interrupt handling is executed.
If the FMR22 bit is set to 1 (erase-suspend
request enabled by interrupt request),
the FMR21 bit is automatically set to 1 (erase-
suspend request). The flash memory suspends
auto-erasure after td(SR-SUS).
If erase-suspend is required while the FMR22 bit
is set to 0 (erase-suspend request disabled by
interrupt request), set the FMR21 bit to 1 during
interrupt handling. The flash memory suspends
auto-erasure after td(SR-SUS).
While auto-erasure is being suspended, any
block other than the block during auto-erasure
execution can be read or written. Auto-erasure
can be restarted by setting the FMR21 bit is set
to 0 (erase restart).
Interrupt handling is executed while auto-erasure or auto-programming is being
performed.
When an interrupt request is acknowledged,
auto-erasure or auto-programming is forcibly
stopped immediately and the flash memory is
reset. Interrupt handling starts when the flash
memory restarts after the fixed period.
Since the block during auto-erasure or the
address during auto-programming is forcibly
stopped, the normal value may not be read. After
the flash memory restarts, execute auto-erasure
again and ensure it completes normally.
The watchdog timer does not stop during the
command operation, so interrupt requests may
be generated. Initialize the watchdog timer
regularly using the erase-suspend function.
(Note 1)
• Undefined Instruction
• INTO Instruction
• BRK Instruction
• Single Step
• Address Match
• Address Break
When an interrupt request is
acknowledged, interrupt handling
is executed.
If erase-suspend is required, set
the FMR21 bit to 1 during interrupt
handling. The flash memory
suspends auto-erasure after
td(SR-SUS).
While auto-erasure is being
suspended, any block other than
the block during auto-erasure
execution can be read or written.
Auto-erasure can be restarted by
setting the FMR21 bit in the FMR2
register is set to 0 (erase restart).
Not usable during auto-erasure or
auto-programming.
32. Usage Notes
(Note 1)