MC908LJ24CPBER Freescale Semiconductor, MC908LJ24CPBER Datasheet - Page 179

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MC908LJ24CPBER

Manufacturer Part Number
MC908LJ24CPBER
Description
IC MCU 24K FLASH 4/8MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CPBER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
HC08
No. Of I/o's
40
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CPBER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
10.6 ROM-Resident Routines
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
MON_PRGRNGE
MON_ERARNGE
MON_LDRNGE
Routine Name
EE_WRITE
PRGRNGE
ERARNGE
EE_READ
LDRNGE
Eight routines stored in the monitor ROM area (thus ROM-resident) are
provided for FLASH memory manipulation. Six of the eight routines are
intended to simplify FLASH program, erase, and load operations. The
other two routines are intended to simplify the use of the FLASH memory
as EEPROM.
routines.
The routines are designed to be called as stand-alone subroutines in the
user program or monitor mode. The parameters that are passed to a
routine are in the form of a contiguous data block, stored in RAM. The
index register (H:X) is loaded with the address of the first byte of the data
block (acting as a pointer), and the subroutine is called (JSR). Using the
start address as a pointer, multiple data blocks can be used, any area of
RAM be used. A data block has the control and data bytes in a defined
order, as shown in
During the software execution, it does not consume any dedicated RAM
location, the run-time heap will extend the system stack, all other RAM
location will not be affected.
Table 10-10. Summary of ROM-Resident Routines
Program a range of locations
Erase a page or the entire array
Loads data from a range of locations
Program a range of locations in
monitor mode
Erase a page or the entire array in
monitor mode
Loads data from a range of locations
in monitor mode
Emulated EEPROM write. Data size
ranges from 2 to 15 bytes at a time.
Emulated EEPROM read. Data size
ranges from 2 to 15 bytes at a time.
Table 10-10
Monitor ROM (MON)
Routine Description
Figure
10-9.
shows a summary of the ROM-resident
Address
$FC06
$FCBE
$FF30
$FF28
$FF2C
$FF24
$FC00
$FC03
Call
ROM-Resident Routines
Monitor ROM (MON)
Stack Used
(bytes)
Data Sheet
14
16
11
11
17
15
9
9
179

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