MC908LJ24CPBER Freescale Semiconductor, MC908LJ24CPBER Datasheet - Page 80

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MC908LJ24CPBER

Manufacturer Part Number
MC908LJ24CPBER
Description
IC MCU 24K FLASH 4/8MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CPBER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
HC08
No. Of I/o's
40
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CPBER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Configuration Registers (CONFIG)
5.3 Functional Description
Data Sheet
80
† One-time writable register after each reset.
†† Reset by POR only.
$001D
Addr.
$001F
Configuration Register 2
Configuration Register 1
Register Name
NOTE:
(CONFIG2)
(CONFIG1)
The configuration registers are used in the initialization of various
options. Since the various options affect the operation of the MCU, it is
recommended that these registers be written immediately after reset.
The configuration registers are located at $001D and $001F. The
configuration registers may be read at anytime.
The CONFIG registers are one-time writable by the user after each
reset. These registers are not in the FLASH memory but are special
registers containing one-time writable latches after each reset. Upon a
reset, the CONFIG registers default to predetermined settings as shown
in
Although the LVISEL[1:0] bits default to predetermined setting of
LVISEL[1:0] = 0:1 by a POR only, these bits can still be written once after
each reset other than POR.
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 5-1. CONFIG Registers Summary
Figure 5-2
COPRS
Bit 7
PEE
Configuration Registers (CONFIG)
0
0
and
LVISTOP LVIRSTD LVIPWRD
= Unimplemented
IRCDIS
STOP_
6
0
0
Figure
XCLKEN
STOP_
5-3.
5
0
0
DIV2CLK
0
4
0
††
PCEH
MC68HC908LJ24/LK24 — Rev. 2.1
3
0
0
0
SSREC
PCEL
Freescale Semiconductor
0
0
2
LVISEL1
STOP
0
1
0
††
LVISEL0
COPD
Bit 0
1
0
††

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