MC908LJ24CFUER Freescale Semiconductor, MC908LJ24CFUER Datasheet - Page 370

IC MCU 24K FLASH 8MHZ SPI 64-QFP

MC908LJ24CFUER

Manufacturer Part Number
MC908LJ24CFUER
Description
IC MCU 24K FLASH 8MHZ SPI 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFUER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CFUER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Liquid Crystal Display (LCD) Driver
17.9.2 LCD Clock Register (LCDCLK)
Data Sheet
370
Address:
The LCD clock register (LCDCLK):
FCCTL[1:0] — Fast Charge Duty Cycle Select
Reset:
Read:
Write:
These read/write bits select the duty cycle of the fast charge duration.
Reset clears these bits. (See
FCCTL1:FCCTL0
Selects the fast charge duty cycle
Selects LCD driver duty cycle
Selects LCD waveform base clock
$004F
Bit 7
00
01
10
11
Liquid Crystal Display (LCD) Driver
0
0
Figure 17-17. LCD Clock Register (LCDCLK)
Table 17-4. Fast Charge Duty Cycle Selection
= Unimplemented
FCCTL1
6
0
In each LCDCLK/2 period, each bias resistor is reduced to
37 kΩ for a duration of LCDCLK/32.
In each LCDCLK/2 period, each bias resistor is reduced to
37 kΩ for a duration of LCDCLK/64.
In each LCDCLK/2 period, each bias resistor is reduced to
37 kΩ for a duration of LCDCLK/128.
Not used
FCCTL0
5
0
DUTY1
17.5.4 Fast Charge and Low
4
0
Fast Charge Duty Cycle
DUTY0
MC68HC908LJ24/LK24 — Rev. 2.1
3
0
LCLK2
Freescale Semiconductor
2
0
LCLK1
1
0
Current)
LCLK0
Bit 0
0

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