MC908LJ24CFUER Freescale Semiconductor, MC908LJ24CFUER Datasheet - Page 419

IC MCU 24K FLASH 8MHZ SPI 64-QFP

MC908LJ24CFUER

Manufacturer Part Number
MC908LJ24CFUER
Description
IC MCU 24K FLASH 8MHZ SPI 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFUER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CFUER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
21.5 COP Control Register
21.6 Interrupts
21.7 Monitor Mode
21.8 Low-Power Modes
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Address:
The COP control register is located at address $FFFF and overlaps the
reset vector. Writing any value to $FFFF clears the COP counter and
starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
The COP does not generate CPU interrupt requests.
When monitor mode is entered with V
disabled as long as V
monitor mode is entered by having blank reset vectors and not having
V
occurs.
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
Reset:
Read:
Write:
TST
on the IRQ pin, the COP is automatically disabled until a POR
$FFFF
Computer Operating Properly (COP)
Bit 7
Figure 21-3. COP Control Register (COPCTL)
6
TST
remains on the IRQ pin or the RST pin. When
5
Low byte of reset vector
Unaffected by reset
Clear COP counter
4
TST
Computer Operating Properly (COP)
on the IRQ pin, the COP is
3
2
COP Control Register
1
Data Sheet
Bit 0
419

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