R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 223
R5F21324ANSP#U1
Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet
1.R5F21322ANSPU1.pdf
(629 pages)
Specifications of R5F21324ANSP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 193 of 583
Figure 17.2
17.3.2
The above applies under the following conditions.
Both bits TSTART and TCSTF in the TRACR register are set to 1 (during count).
Counter of timer RA
Timer RA has a prescaler and a timer (which counts the prescaler underflows). The prescaler and timer each
consist of a reload register and a counter. When writing to the prescaler or timer, values are written to both the
reload register and counter.
However, values are transferred from the reload register to the counter of the prescaler in synchronization with
the count source. In addition, values are transferred from the reload register to the counter of the timer in
synchronization with prescaler underflows. Therefore, if the prescaler or timer is written to when count
operation is in progress, the counter value is not updated immediately after the WRITE instruction is executed.
Figure 17.2 shows an Operating Example of Timer RA when Counter Value is Rewritten during Count
Operation.
timer RA prescaler
timer RA prescaler
Reload register of
Reload register of
IR bit in TRAIC
Count source
Set 01h to the TRAPRE register and 25h to
the TRA register by a program.
Timer Write Control during Count Operation
Counter of
timer RA
register
Operation
Preliminary specification
Specifications in this manual are tentative and subject to change.
Operating Example of Timer RA when Counter Value is Rewritten during Count
0
Previous value
06h
Nov 05, 2008
05h
Previous value
The IR bit remains unchanged until underflow is
generated by a new value.
After writing, the reload register is
written to at the first count source.
03h
04h
01h
Reload at
second count
source
00h
After writing, the reload register is
written to at the first underflow.
01h
Reload at
underflow
02h
New value (01h)
00h
Reload at the second underflow
01h
25h
New value (25h)
00h
01h
24h
00h
17. Timer RA
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