R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 233
R5F21324ANSP#U1
Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet
1.R5F21322ANSPU1.pdf
(629 pages)
Specifications of R5F21324ANSP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 203 of 583
Figure 17.4
17.7.2
Conditions: The period from one rising edge to the next rising edge of the measured pulse is measured (TEDGSEL = 0) with
the default value of the TRA register as 0Fh.
Notes:
1. The contents of the read-out buffer can be read by reading the TRA register in pulse period measurement mode.
2. After an active edge of the measured pulse is input, the TEDGF bit in the TRACR register is set to 1 (active edge received) when the
3. The TRA register should be read before the next active edge is input after the TEDGF bit is set to 1 (active edge received).
4. To set to 0 by a program, use a MOV instruction to write 0 to the TEDGF bit in the TRACR register. At the same time, write 1 to the
5. To set to 0 by a program, use a MOV instruction to write 0 to the TUNDF bit. At the same time, write 1 to the TEDGF bit.
6. Bits TUNDF and TEDGF are both set to 1 if timer RA underflows and reloads on an active edge simultaneously.
Contents of read-out
Measurement pulse
Underflow signal of
timer RA prescaler
timer RA prescaler underflows for the second time.
The contents in the read-out buffer are retained until the TRA register is read. If the TRA register is not read before the next active edge
is input, the measured result of the previous period is retained.
TUNDF bit in the TRACR register.
(TRAIO pin input)
Contents of TRA
TRACR register
TRACR register
TRACR register
IR bit in TRAIC
TSTART bit in
TEDGF bit in
TUNDF bit in
Operating Example
buffer
register
Preliminary specification
Specifications in this manual are tentative and subject to change.
Operating Example of Pulse Period Measurement Mode
(1)
1
0
1
0
1
0
1
0
1
0
Count start
Set to 1 by program
0Fh
Nov 05, 2008
0Fh
0Eh 0Dh 0Fh 0Eh 0Dh 0Ch 0Bh 0Ah 09h 0Fh 0Eh 0Dh
0Eh
(Note 2)
Retained
TRA reloaded
0Dh
TRA read
Set to 0 when interrupt request is acknowledged, or set by program
Set to 0 by program
(3)
0Bh 0Ah
(Note 2)
Retained
(Note 4)
TRA reloaded
09h
0Dh
Set to 0 by program
01h 00h 0Fh 0Eh
01h 00h 0Fh 0Eh
(Note 6)
17. Timer RA
Underflow
(Note 5)
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