R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 281
R5F21324ANSP#U1
Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet
1.R5F21322ANSPU1.pdf
(629 pages)
Specifications of R5F21324ANSP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 251 of 583
19.5.2
Notes:
1. When the BFC bit in the TRCMR register is set to 1 (buffer register of TRCGRA register), set the IOC2 bit in
2. When the BFD bit in the TRCMR register is set to 1 (buffer register of TRCGRB register), set the IOD2 bit in the
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0124h
theTRCIOR1 register to the same value as the IOA2 bit in the TRCIOR0 register.
TRCIOR1 register to the same value as the IOB2 bit in the TRCIOR0 register.
Symbol
Symbol
Bit
IOA0
IOA1
IOA2
IOA3
IOB0
IOB1
IOB2
Timer RC I/O Control Register 0 (TRCIOR0) for Output Compare Function
—
Preliminary specification
Specifications in this manual are tentative and subject to change.
b7
—
1
TRCGRA control bit
TRCGRA mode select bit
TRCGRA input capture input
switch bit
TRCGRB control bit
TRCGRB mode select bit
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
IOB2
b6
0
Nov 05, 2008
Bit Name
IOB1
b5
0
(1)
(2)
IOB0
b4
0
b1 b0
Set to 0 (output compare) in the output compare
function.
Set to 1.
b5 b4
Set to 0 (output compare) in the output compare
function.
0 0: Disable pin output by compare match (TRCIOA pin
0 1: “L” output by compare match in the TRCGRA
1 0: “H” output by compare match in the TRCGRA
1 1: Toggle output by compare match in the TRCGRA
0 0: Disable pin output by compare match (TRCIOB pin
0 1: “L” output by compare match in the TRCGRB
1 0: “H” output by compare match in the TRCGRB
1 1: Toggle output by compare match in the TRCGRB
functions as the programmable I/O port)
register
register
register
functions as the programmable I/O port)
register
register
register
IOA3
b3
1
IOA2
b2
0
Function
IOA1
b1
0
IOA0
b0
0
19. Timer RC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
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