R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 615
R5F21324ANSP#U1
Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet
1.R5F21322ANSPU1.pdf
(629 pages)
Specifications of R5F21324ANSP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Manufacturer
Quantity
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Rev.
0.20
REVISION HISTORY
Nov 05, 2008
Date
165 to 185 15. DTC revised
Page
102
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98
7.4.13 “For ports set to output as ... no pull-up resistor is connected.” →
7.4.14 “For ports set to output as ... no pull-up resistor is connected.” →
7.4.15 “For pins used as output, ... the P1DRR register are valid.” added
7.4.16 “For pins used as output ... the DRR0 register are valid.” added
7.4.17 “For pins used as output ... the DRR1 register are valid.” added
Table 7.13 Function: “Comparator B3 input (IVCMP1)” → “Comparator
Table 7.26 revised
Figure 7.9 revised
Table 9.1 revised
Figure 9.1 revised
Figure 9.2 revised
9.2.1 b6 revised
9.2.2 b6, b7 revised
9.2.3 revised
9.2.6 revised
9.2.7 revised
9.2.13 revised
9.4.2 revised
9.7.1 “If the new clock source is ... before the MCU exits.” →
Table 9.4 revised
10.1.1 b6, b7 revised
11.1.3.6 “... if the AIER0 bit in the AIER0 register or the AIER1 bit ...” →
Figure 11.10 Note1 revised
11.6.1 revised
14.1 “The watchdog timer contains a 15-bit counter ...” → “The watchdog
14.2.2 Note1 added
14.2.4 revised
14.3.1.1 “Do not execute ... the watchdog timer is stopped.” added
Table 14.2 Note3 added
Table 14.3 Note3 added
Figure 17.1 revised
17.2.1 Note2 “
timer contains a 14-bit counter ...”
Note1 added
“Allow sufficient wait time ... before switching the clock.”
“For pins used as input, ... the PUR0 register are valid.”
“For pins used as input, ... the PUR1 register are valid.”
“... if the AIER00 bit in the AIER0 register or the AIER10 bit ...”
B3 input (IVCMP3)”
Count stop condition: Specification revised
R8C/32A Group Hardware Manual
TPRAPRE”
C - 2
Description
→
“TRAPRE”
Summary
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