R5F21334CNFP#U0 Renesas Electronics America, R5F21334CNFP#U0 Datasheet - Page 20

• Manufacturer Part Number: R5F21334CNFP#U0
• Description: MCU 1KB FLASH 16K ROM 32-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/33Cr

Specifications of R5F21334CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

25.
26.
25.1
25.2
25.3
25.4
25.5
25.6
25.7
25.8
25.9
26.1
26.2
26.3
26.4
26.5
26.6
25.2.1
25.2.2
25.2.3
25.2.4
25.2.5
25.2.6
25.2.7
25.2.8
25.2.9
25.2.10 IIC bus Status Register (ICSR) ......................................................................................................... 414
25.2.11 Slave Address Register (SAR) .......................................................................................................... 415
25.2.12 IIC bus Shift Register (ICDRS) ........................................................................................................ 415
25.3.1
25.3.2
25.3.3
25.4.1
25.4.2
25.4.3
25.4.4
25.4.5
25.5.1
25.5.2
25.5.3
26.3.1
26.3.2
26.3.3
26.4.1
26.4.2
26.4.3
26.4.4
I
Hardware LIN .............................................................................................................................. 441
2
C bus Interface ......................................................................................................................... 403
Overview ............................................................................................................................................... 403
Registers ................................................................................................................................................ 406
Common Items for Multiple Modes ...................................................................................................... 416
I
Clock Synchronous Serial Mode ........................................................................................................... 431
Examples of Register Setting ................................................................................................................ 434
Noise Canceller ..................................................................................................................................... 438
Bit Synchronization Circuit ................................................................................................................... 439
Notes on I
Overview ............................................................................................................................................... 441
Input/Output Pins .................................................................................................................................. 442
Registers ................................................................................................................................................ 443
Function Description ............................................................................................................................. 445
Interrupt Requests .................................................................................................................................. 454
Notes on Hardware LIN ........................................................................................................................ 455
2
C bus Interface Mode ......................................................................................................................... 420
Module Standby Control Register (MSTCR) ................................................................................... 406
SSU/IIC Pin Select Register (SSUIICSR) ........................................................................................ 407
I/O Function Pin Select Register (PINSR) ....................................................................................... 408
IIC bus Transmit Data Register (ICDRT) ......................................................................................... 409
IIC bus Receive Data Register (ICDRR) .......................................................................................... 409
IIC bus Control Register 1 (ICCR1) ................................................................................................. 410
IIC bus Control Register 2 (ICCR2) ................................................................................................. 411
IIC bus Mode Register (ICMR) ........................................................................................................ 412
IIC bus Interrupt Enable Register (ICIER) ....................................................................................... 413
Transfer Clock .................................................................................................................................. 416
SDA Pin Digital Delay Selection ...................................................................................................... 418
Interrupt Requests ............................................................................................................................. 419
I2C bus Format ................................................................................................................................. 420
Master Transmit Operation ............................................................................................................... 421
Master Receive Operation ................................................................................................................ 423
Slave Transmit Operation ................................................................................................................. 426
Slave Receive Operation ................................................................................................................... 429
Clock Synchronous Serial Format .................................................................................................... 431
Transmit Operation ........................................................................................................................... 432
Receive Operation ............................................................................................................................. 433
LIN Control Register 2 (LINCR2) .................................................................................................... 443
LIN Control Register (LINCR) ......................................................................................................... 444
LIN Status Register (LINST) ............................................................................................................ 444
Master Mode ..................................................................................................................................... 445
Slave Mode ....................................................................................................................................... 448
Bus Collision Detection Function ..................................................................................................... 452
Hardware LIN End Processing ......................................................................................................... 453
2
C bus Interface .................................................................................................................... 440
A - 11