R5F21334CNFP#U0 Renesas Electronics America, R5F21334CNFP#U0 Datasheet - Page 208

MCU 1KB FLASH 16K ROM 32-LQFP

R5F21334CNFP#U0

Manufacturer Part Number
R5F21334CNFP#U0
Description
MCU 1KB FLASH 16K ROM 32-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/33Cr
Datasheet

Specifications of R5F21334CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
27
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/33C Group
REJ09B0570-0100 Rev.1.00 Dec. 14, 2009
Page 178 of 589
15.2.1
Notes:
15.2.2
Note:
After Reset
1. This bit is valid when the MODE bit is 1 (repeat mode).
2. Settings of bits SAMOD and DAMOD are invalid for the repeat area.
3. Set the CHNE bit in the DTCCR23 register to 0 (chain transfers disabled).
After Reset
1. When the DTBLS register is set to 00h, the block size is 256 bytes.
Bit
b0
b1
b2
b3
b4
b5
b6
b7
b7 to b0
Address Refer to Table 15.4 Control Data Allocation Addresses.
Address Refer to Table 15.4 Control Data Allocation Addresses.
Symbol
Symbol
Bit
RPTSEL Repeat area select bit
DAMOD Destination address control bit
SAMOD Source address control bit
RPTINT Repeat mode interrupt enable bit
Symbol
MODE
CHNE
Bit
Bit
DTC Control Register j (DTCCRj) (j = 0 to 23)
DTC Block Size Register j (DTBLSj) (j = 0 to 23)
These bits specify the size of the data block to be transferred by one
activation.
b7
b7
X
X
Transfer mode select bit
Chain transfer enable bit
Reserved bits
b6
b6
X
X
Bit Name
RPTINT
b5
b5
X
X
(1)
(3)
(2)
CHNE
Function
b4
b4
X
X
(2)
(1)
DAMOD SAMOD RPTSEL
0: Normal mode
1: Repeat mode
0: Transfer destination is the repeat area.
1: Transfer source is the repeat area.
0: Fixed
1: Incremented
0: Fixed
1: Incremented
0: Chain transfers disabled
1: Chain transfers enabled
0: Interrupt generation disabled
1: Interrupt generation enabled
Set to 0.
b3
b3
X
X
b2
b2
X
X
Function
b1
b1
X
X
MODE
b0
X
b0
Setting Range
00h to FFh
X
(1)
15. DTC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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