R5F21334CNFP#U0 Renesas Electronics America, R5F21334CNFP#U0 Datasheet - Page 210

• Manufacturer Part Number: R5F21334CNFP#U0
• Description: MCU 1KB FLASH 16K ROM 32-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/33Cr

Specifications of R5F21334CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/33C Group
REJ09B0570-0100 Rev.1.00 Dec. 14, 2009
Page 180 of 589
15.2.7
i = 0 to 3, 5, 6
Note:
Table 15.2
After Reset
1. For the operation of this bit, refer to 15.3.7 Interrupt Sources.
DTCEN0
DTCEN1
DTCEN2
DTCEN3
DTCEN5
DTCEN6
Register
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0088h (DTCEN0), 0089h (DTCEN1), 008Ah (DTCEN2), 008Bh (DTCEN3), 008Dh (DTCEN5),
The DTCENi registers enable/disable DTC activation by interrupt sources. Table 15.2 shows Correspondences
between Bits DTCENi0 to DTCENi7 (i = 0 to 3, 5, 6) and Interrupt Sources.
Symbol DTCENi7 DTCENi6 DTCENi5 DTCENi4 DTCENi3 DTCENi2 DTCENi1 DTCENi0
DTCENi0 DTC activation enable bit
DTCENi1
DTCENi2
DTCENi3
DTCENi4
DTCENi5
DTCENi6
DTCENi7
Symbol
Bit
DTC Activation Enable Register i (DTCENi) (i = 0 to 3, 5, 6)
SSU/I
receive data
008Eh (DTCEN6)
DTCENi7
Timer RC
compare-
Key input
match C
capture/
Correspondences between Bits DTCENi0 to DTCENi7 (i = 0 to 3, 5, 6) and Interrupt
Sources
input-
INT0
b7
full
Bit
—
—
0
2
C bus
SSU/I
data empty
conversion
Timer RC
DTCENi6
compare-
Timer RA
match D
b6
transmit
capture/
0
input-
INT1
A/D
Bit
—
2
C bus
Bit Name
b5
0
DTCENi5
reception
Monitor 2
Timer RE
Voltage
UART0
Bit
—
—
—
(1)
b4
0
transmission
DTCENi4
Monitor 1
Timer RB
UART0
Voltage
INT3
0: Activation disabled
1: Activation enabled
Bit
—
—
b3
0
Flash ready
DTCENi3
reception
UART1
status
Bit
—
—
—
—
b2
0
Function
transmission
DTCENi2
UART1
b1
0
Bit
—
—
—
—
—
b0
Timer RC
compare-
0
DTCENi1
reception
match A
capture/
UART2
input-
Bit
—
—
—
—
transmission
Timer RC
DTCENi0
compare-
capture/
match B
UART2
input-
Bit
—
—
—
—
15. DTC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W