R5F21334CNFP#U0 Renesas Electronics America, R5F21334CNFP#U0 Datasheet - Page 601

• Manufacturer Part Number: R5F21334CNFP#U0
• Description: MCU 1KB FLASH 16K ROM 32-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/33Cr

Specifications of R5F21334CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/33C Group
REJ09B0570-0100 Rev.1.00 Dec. 14, 2009
Page 571 of 589
33.8.5
33.8.6
33.8.7
•
Switching procedure
(1) Set the TSTART bit in the TRCMR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRCCR1 register.
(3) Wait for a minimum of two cycles of fOCO-F.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
•
Switching procedure
(1) Set the TSTART bit in the TRCMR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRCCR1 register.
(3) Wait for a minimum of one cycle of fOCO-F + fOCO40M.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
•
•
When the CSEL bit in the TRCCR2 register is set to 1 (count stops at compare match with the TRCGRA
register), do not set the TRCMR register at compare match timing of registers TRC and TRCGRA.
The count source fOCO40M can be used with supply voltage VCC = 2.7 to 5.5 V. For supply voltage other than
that, do not set bits TCK2 to TCK0 in the TRCCR1 register to 110b (select fOCO40M as the count source).
After switching the count source from fOCO-F to fOCO40M, allow a minimum of two cycles of fOCO-F to
elapse after changing the clock setting before stopping fOCO-F.
After switching the count source from fOCO-F to a clock other than fOCO40M, allow a minimum of one
cycle of fOCO-F + fOCO40M to elapse after changing the clock setting before stopping fOCO-F.
Set the pulse width of the input capture signal as follows:
[When the digital filter is not used]
Three or more cycles of the timer RC operation clock (refer to Table 19.1 Timer RC Operation Clock)
[When the digital filter is used]
Five cycles of the digital filter sampling clock + three cycles of the timer RC operating clock, minimum (refer
to Figure 19.5 Digital Filter Block Diagram)
The value of the TRC register is transferred to the TRCGRj register one or two cycles of the timer RC
operation clock after the input capture signal is input to the TRCIOj (j = A, B, C, or D) pin (when the digital
filter function is not used).
Input Capture Function
TRCMR Register in PWM2 Mode
Count Source fOCO40M
33. Usage Notes