R5F21334CNFP#U0 Renesas Electronics America, R5F21334CNFP#U0 Datasheet - Page 83

MCU 1KB FLASH 16K ROM 32-LQFP

R5F21334CNFP#U0

Manufacturer Part Number
R5F21334CNFP#U0
Description
MCU 1KB FLASH 16K ROM 32-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/33Cr
Datasheet

Specifications of R5F21334CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
27
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/33C Group
REJ09B0570-0100 Rev.1.00 Dec. 14, 2009
Page 53 of 589
6.6
Table 6.3
Notes:
Table 6.3 lists the Procedure for Setting Bits Associated with Voltage Monitor 2 Interrupt. Figure 6.7 shows an
Operating Example of Voltage Monitor 2 Interrupt.
To use the voltage monitor 2 interrupt to exit stop mode, set the VW2C1 bit in the VW2C register to 1 (digital filter
disabled).
11
Step
4
6
1. When the VW2C0 bit is set to 0, steps 3 and 4 can be executed simultaneously (with one instruction).
2. When the VW2C0 bit is set to 0, steps 5 and 6 can be executed simultaneously (with one instruction).
3. When making the setting while the voltage monitor 2 interrupt is disabled (the VW2C0 bit in the
10
1
2
3
5
7
8
9
(2)
(1)
(3)
VW2C register is 0 and the VCA27 bit in the VCA2 register is 0), no interrupt request is generated if
VCC < Vdet2 (or VCC > Vdet2) is detected before enabling the voltage monitor 2 interrupt in step 11.
If VCC < Vdet2 (or VCC > Vdet2) is detected between step 9 and step 11, the VW2C2 bit is set to 1.
Read the VW2C2 bit after step 11. If this bit is read as 1, perform the processing to be executed when
the above state is detected.
Voltage Monitor 2 Interrupt
Set the VCA27 bit in the VCA2 register to 1 (voltage detection 2 circuit enabled).
Wait for td(E-A).
Set the COMPSEL bit in the CMPA register to 1.
Select the interrupt type by the IRQ2SEL in the CMPA register.
Select the sampling clock of the digital filter by
bits VW2F0 and VW2F1 in the VW2C register.
Set the VW2C1 bit in the VW2C register to 0
(digital filter enabled).
Select the interrupt request timing by the VCAC2 bit in the VCAC register and
the VW2C7 bit in the VW2C register.
Set the VW2C2 bit in the VW2C register to 0.
Set the CM14 bit in the CM1 register to 0
(low-speed on-chip oscillator on).
Wait for 2 cycles of the sampling clock of
the digital filter.
Set the VW2C0 bit in the VW2C register to 1 (voltage monitor 2 interrupt enabled).
Procedure for Setting Bits Associated with Voltage Monitor 2 Interrupt
When Using Digital Filter
Set the VW2C1 bit in the VW2C register to 1
(digital filter disabled).
− (No wait time required)
When Using No Digital Filter
6. Voltage Detection Circuit

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