MC908LJ24CFQE Freescale Semiconductor, MC908LJ24CFQE Datasheet - Page 33

IC MCU 24K FLASH 8MHZ SPI 80-QFP

MC908LJ24CFQE

Manufacturer Part Number
MC908LJ24CFQE
Description
IC MCU 24K FLASH 8MHZ SPI 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFQE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
48
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CFQE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Data Sheet — MC68HC908LJ24
Table
2-1
4-1
5-1
6-1
6-2
8-1
8-3
8-2
9-1
9-2
9-3
10-1 Monitor Mode Signal Requirements and Options . . . . . . . . . . 168
10-2 Mode Differences (Vectors) . . . . . . . . . . . . . . . . . . . . . . . . . . 170
10-3 Monitor Baud Rate Selection . . . . . . . . . . . . . . . . . . . . . . . . . 172
10-4 READ (Read Memory) Command . . . . . . . . . . . . . . . . . . . . . 173
10-5 WRITE (Write Memory) Command. . . . . . . . . . . . . . . . . . . . . 174
10-6 IREAD (Indexed Read) Command . . . . . . . . . . . . . . . . . . . . . 174
10-7 IWRITE (Indexed Write) Command . . . . . . . . . . . . . . . . . . . . 175
10-8 READSP (Read Stack Pointer) Command . . . . . . . . . . . . . . . 175
10-9 RUN (Run User Program) Command . . . . . . . . . . . . . . . . . . . 176
10-10 Summary of ROM-Resident Routines . . . . . . . . . . . . . . . . . . 179
10-11 PRGRNGE Routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
10-12 ERARNGE Routine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
10-13 LDRNGE Routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .184
FLASH Block Protect Register to Physical Address . . . . . . . . . 78
LVI Trip Point Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Numeric Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
VPR1 and VPR0 Programming . . . . . . . . . . . . . . . . . . . . . . .128
Signal Name Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
PIN Bit Set Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Vector Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .154
Vector Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
PRE 1 and PRE0 Programming . . . . . . . . . . . . . . . . . . . . . . . 128
List of Tables
Title
List of Tables
Data Sheet
Page
33

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