MC908LJ24CFQE Freescale Semiconductor, MC908LJ24CFQE Datasheet - Page 343

IC MCU 24K FLASH 8MHZ SPI 80-QFP

MC908LJ24CFQE

Manufacturer Part Number
MC908LJ24CFQE
Description
IC MCU 24K FLASH 8MHZ SPI 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFQE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
48
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CFQE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
ADCH4
NOTES:
1. If any reserved channels are selected, the resulting ADC conversion will be unknown.
2. The voltage levels supplied from internal reference nodes as specified in the table are used to verify the operation of
the ADC converter both in production test and for user applications.
0
0
0
0
0
0
0
0
0
1
1
1
1
NOTE:
ADCH3
0
0
0
0
0
0
0
0
1
1
1
1
1
ADCO — ADC Continuous Conversion Bit
ADCH[4:0] — ADC Channel Select Bits
Care should be taken when using a port pin as both an analog and a
digital input simultaneously to prevent switching noise from corrupting
the analog signal.
Recovery from the disabled state requires one conversion cycle to
stabilize.
ADCH2
When set, the ADC will convert samples continuously and update the
ADC data register at the end of each conversion. Only one conversion
is allowed when this bit is cleared. Reset clears the ADCO bit.
ADCH[4:0] form a 5-bit field which is used to select one of the ADC
channels when not in auto-scan mode. The five channel select bits
are detailed in
0
0
0
0
1
1
1
1
0
1
1
1
1
1 = Continuous ADC conversion
0 = One ADC conversion
Table 16-1. MUX Channel Select
Analog-to-Digital Converter (ADC)
ADCH1
0
0
1
1
0
0
1
1
0
0
0
1
1
Table
ADCH0
16-1.
0
1
0
1
0
1
0
1
0
0
1
0
1
ADC powered-off
ADC Channel
ADC28
ADC29
ADC30
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADC8
Analog-to-Digital Converter (ADC)
1.2V Bandgap reference
V
V
REFH
REFL
Input Select
Reserved
(see Note 2)
PTB6
PTB7
(see Note 2)
PTA4
PTA5
PTA6
PTA7
V
LCD
I/O Registers
Data Sheet
343

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