MC908LJ24CFQE Freescale Semiconductor, MC908LJ24CFQE Datasheet - Page 49

IC MCU 24K FLASH 8MHZ SPI 80-QFP

MC908LJ24CFQE

Manufacturer Part Number
MC908LJ24CFQE
Description
IC MCU 24K FLASH 8MHZ SPI 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFQE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
48
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CFQE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2.1 Contents
2.2 Introduction
2.3 Unimplemented Memory Locations
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Data Sheet — MC68HC908LJ24
2.2
2.3
2.4
2.5
The CPU08 can address 64k-bytes of memory space. The memory
map, shown in
Accessing an unimplemented location can cause an illegal address
reset. In the memory map
document, unimplemented locations are shaded.
24,576 bytes of user FLASH memory
768 bytes of random-access memory (RAM)
48 bytes of user-defined vectors
959 bytes of monitor ROM
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Unimplemented Memory Locations . . . . . . . . . . . . . . . . . . . . . 49
Reserved Memory Locations . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Input/Output (I/O) Section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure
Memory Map
2-1, includes:
(Figure
Section 2. Memory Map
2-1) and in register figures in this
Data Sheet
49

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