R5F21272SNFP#U0 Renesas Electronics America, R5F21272SNFP#U0 Datasheet - Page 294

IC R8C/27 MCU FLASH 32LQFP

R5F21272SNFP#U0

Manufacturer Part Number
R5F21272SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21272SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 16.12
16.2.5
16.2.5.1
Figure 16.12 shows the Initialization in Clock Synchronous Communication Mode. To initialize, set the TE bit
in the SSER register to 0 (transmit disabled) and the RE bit to 0 (receive disabled) before data transmission or
reception.
Set the TE bit to 0 and the RE bit to 0 before changing the communication mode or format.
Setting the RE bit to 0 does not change the contents of flags RDRF and ORER or the contents of the SSRDR
register.
Sep 26, 2008
Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Page 275 of 453
NOTE:
1. Write 0 after reading 1 to set the ORER bit to 0.
SSER register
SSCRH register
SSMR2 register
SSMR register
SSMR2 register
SSSR register
SSCRH register
SSER register
Set bits CKS0 to CKS2
Set RSSTP bit
RE bit ← 1 (receive)
TE bit ← 1 (transmit)
Set bits RIE, TEIE, and TIE
Start
End
SCKS bit ← 1
Set SOOS bit
CPHS bit ← 0
CPOS bit ← 0
Set MLS bit
ORER bit ← 0
SSUMS bit ← 0
Set MSS bit
RE bit ← 0
TE bit ← 0
(1)
16. Clock Synchronous Serial Interface

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