R5F21272SNFP#U0 Renesas Electronics America, R5F21272SNFP#U0 Datasheet - Page 71

• Manufacturer Part Number: R5F21272SNFP#U0
• Description: IC R8C/27 MCU FLASH 32LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/27r

Specifications of R5F21272SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 25
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
7.
There are 25 programmable Input/Output ports (I/O ports) P0, P1, P3_1, P3_3 to P3_7, P4_5, P5_3, and P5_4. Also,
P4_6 and P4_7 can be used as input-only ports if the XIN clock oscillation circuit and XCIN clock oscillation circuit
is not used, and the P4_2 can be used as an input-only port if the A/D converter is not used.
Table 7.1 lists an Overview of Programmable I/O Ports.
NOTE:
7.1
Table 7.1
NOTES:
Table 7.2
i = 0, 1, 3 to 5, j = 0 to 7
NOTE:
P0, P1
P3_1, P3_3 to P3_7
P4_5
P5_3, P5_4
P4_2
P4_6, P4_7
Reading
Writing
Operation When
The PDi_j (j = 0 to 7) bit in the PDi (i = 0, 1, 3 to 5) register controls I/O of the ports P0, P1, P3_1, P3_3 to P3_7,
P4_5, P5_3, and P5_4. The Pi register consists of a port latch to hold output data and a circuit to read pin states.
Figures 7.1 to 7.6 show the Configurations of Programmable I/O Ports. Table 7.2 lists the Functions of
Programmable I/O Ports. Also, Figure 7.8 shows the PDi (i = 0, 1, and 3 to 5) Register. Figure 7.9 shows the Pi (i =
0, 1, and 3 to 5) Register, Figure 7.10 shows Registers PINSR1, PINSR2, and PINSR3, Figure 7.11 shows the PMR
Register, Figure 7.12 shows Registers PUR0 and PUR1, and Figure 7.13 shows the P1DRR Register.
Programmable I/O Ports
1. The XCIN clock oscillation circuit cannot be used for J, K version.
1. In input mode, whether an internal pull-up resistor is connected or not can be selected by registers
2. When the A/D converter is not used, this port can be used as the input-only port.
3. When the XIN clock oscillation circuit and XCIN clock oscillation circuit (for N, D version only) is not
1. Nothing is assigned to bits PD3_0, PD3_2, PD4_0 to PD4_4, PD4_6, and PD4_7.
Pi Register
Accessing
(2)
PUR0 and PUR1.
used, these ports can be used as the input-only ports.
Functions of Programmable I/O Ports
Sep 26, 2008
Ports
(3)
Overview of Programmable I/O Ports
Functions of Programmable I/O Ports
Read pin input level
Write to the port latch
When PDi_j Bit is Set to 0 (Input Mode)
I/O
I/O CMOS3 State
I/O CMOS3 State
I/O CMOS3 State
I/O CMOS3 State
Page 52 of 453
I
(No output function)
Type of Output
Value of PDi_j Bit in PDi Register
Set per bit
Set per bit
Set per bit
Set per bit
None
I/O Setting
Read the port latch
Write to the port latch. The value written to
the port latch is output from the pin.
When PDi_j Bit is Set to 1 (Output Mode)
Set every 4 bits
Set every 2 bits, 4 bits
Set every bit
Set every bit
None
(1)
Internal Pull-Up Resister
7. Programmable I/O Ports
(1)
(1)
(1)
(1)
(1)