R5F21274SNFP#U0 Renesas Electronics America, R5F21274SNFP#U0 Datasheet - Page 315

IC R8C/27 MCU FLASH 32LQFP

R5F21274SNFP#U0

Manufacturer Part Number
R5F21274SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21274SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
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Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
R5F21274SNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Part Number:
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Manufacturer:
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Quantity:
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Company:
Part Number:
R5F21274SNFP#U0R5F21274SNFP#X6
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 16.27
IIC bus Interrupt Enable Register
b7 b6 b5 b4
NOTES:
1.
2. Set the STIE bit to 1 (enable stop condition detection interrupt request) w hen the STOP bit in the ICSR register is set
An overrun error interrupt request is generated w hen the clock synchronous format is used.
to 0.
Sep 26, 2008
b3 b2 b1
ICIER Register
b0
Bit Symbol
ACKBR
Symbol
ACKBT
NAKIE
ACKE
ICIER
STIE
TEIE
RIE
TIE
Page 296 of 453
Transmit acknow ledge
select bit
Receive acknow ledge bit
Acknow ledge bit judgment
select bit
Stop condition detection
interrupt enable bit
NACK receive interrupt
enable bit
Receive interrupt enable
bit
Transmit end interrupt
enable bit
Transmit interrupt enable
bit
Address
Bit Name
00BBh
0 : 0 is transmitted as acknow ledge bit in
1 : 1 is transmitted as acknow ledge bit in
0 : Acknow ledge bit received from
1 : Acknow ledge bit received from
0 : Value of receive acknow ledge bit is ignored
1 : When receive acknow ledge bit is set to 1,
0 : Disables stop condition detection interrupt
1 : Enables stop condition detection interrupt
0 : Disables NACK receive interrupt request and
1 : Enables NACK receive interrupt request and
0 : Disables receive data full and overrun
1 : Enables receive data full and overrun
0 : Disables transmit end interrupt request
1 : Enables transmit end interrupt request
0 : Disables transmit data empty interrupt request
1 : Enables transmit data empty interrupt request
receive device in transmit mode is set to 0.
receive device in transmit mode is set to 1.
and continuous transfer is performed.
continuous transfer is halted.
request
request
arbitration lost/overrun error interrupt request
arbitration lost/overrun error interrupt request
error interrupt request
error interrupt request
receive mode.
receive mode.
(2)
16. Clock Synchronous Serial Interface
After Reset
Function
00h
(1)
(1)
RW
RW
RW
RW
RW
RW
RW
RW
RO

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