R5F21274SNFP#U0 Renesas Electronics America, R5F21274SNFP#U0 Datasheet - Page 63

IC R8C/27 MCU FLASH 32LQFP

R5F21274SNFP#U0

Manufacturer Part Number
R5F21274SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21274SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 6.12
Voltage Monitor 2 Circuit Control Register
b7 b6 b5 b4
NOTES:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Set the PRC3 bit in the PRCR register to 1 (w rite enable) before w riting to the VW2C register.
To use the voltage monitor 2 interrupt to exit stop mode and to return again, w rite 0 to the VW2C1
bit before w riting 1.
The VW2C2 bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit
enabled).
Set this bit to 0 by a program. When 0 is w ritten by a program, it is set to 0 (and remains unchanged even if 1 is
w ritten to it).
The VW2C6 bit is enabled w hen the VW2C0 bit is set to 1 (voltage monitor 2 interrupt/enables reset).
The VW2C0 bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit
enabled). Set the VW2C0 bit to 0 (disable) w hen the VCA27 bit is set to 0 (voltage detection 2 circuit disabled).
The VW2C7 bit is enabled w hen the VW2C1 bit is set to 1 (digital filter disabled mode).
Bits VW2C2 and VW2C3 remain unchanged after a softw are reset, w atchdog timer reset, voltage monitor 1 reset
(for N, D version only), or voltage monitor 2 reset.
When the VW2C6 bit is set to 1 (voltage monitor 2 reset mode), set the VW2C7 bit to 1 (w hen VCC reaches Vdet2 or
below ). (Do not set to 0.)
Sep 26, 2008
b3 b2
VW2C Register
b1 b0
Bit Symbol
VW2C0
VW2C2
VW2C3
VW2C6
VW2C7
VW2C1
VW2F0
VW2F1
Symbol
VW2C
Page 44 of 453
Voltage monitor 2 interrupt/reset
enable bit
Voltage monitor 2 digital filter
disable mode select bit
Voltage change detection
flag
WDT detection flag
Sampling clock select bits
Voltage monitor 2 circuit mode
select bit
Voltage monitor 2 interrupt/reset
generation condition select
bit
(7,9)
(3,4,8)
(5)
(6)
Address
Bit Name
(1)
0037h
(4,8)
(2)
b5 b4
0 0 : fOCO-S divided by 1
0 1 : fOCO-S divided by 2
1 0 : fOCO-S divided by 4
1 1 : fOCO-S divided by 8
0 : Disable
1 : Enable
0 : Digital filter enabled mode
1 : Digital filter disabled mode
0 : Not detected
1 : VCC has crossed Vdet2
0 : Not detected
1 : Detected
0 : Voltage monitor 2 interrupt mode
1 : Voltage monitor 2 reset mode
0 : When VCC reaches Vdet2 or above
1 : When VCC reaches Vdet2 or below
(digital filter circuit enabled)
(digital filter circuit disabled)
After Reset
Function
00h
6. Voltage Detection Circuit
(8)
RW
RW
RW
RW
RW
RW
RW
RW
RW

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