MC9S08GT32CFD Freescale Semiconductor, MC9S08GT32CFD Datasheet - Page 189
MC9S08GT32CFD
Manufacturer Part Number
MC9S08GT32CFD
Description
MCU 8BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.M68EVB908GB60E.pdf
(290 pages)
Specifications of MC9S08GT32CFD
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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12.1
Features of the SPI module include:
12.2
This section includes block diagrams showing SPI system connections, the internal organization of the SPI
module, and the SPI clock dividers that control the master mode bit rate.
12.2.1
Figure 12-2
device initiates all SPI data transfers. During a transfer, the master shifts data out (on the MOSI1 pin) to
the slave while simultaneously shifting data in (on the MISO1 pin) from the slave. The transfer effectively
exchanges the data that was in the SPI shift registers of the two SPI systems. The SPSCK1 signal is a clock
output from the master and an input to the slave. The slave device must be selected by a low level on the
slave select input (SS1 pin). In this system, the master device has configured its SS1 pin as an optional
slave select output.
Freescale Semiconductor
•
•
•
•
•
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Master or slave mode operation
Full-duplex or single-wire bidirectional option
Programmable transmit bit rate
Double-buffered transmit and receive
Serial clock phase and polarity options
Slave select output
Selectable MSB-first or LSB-first shifting
7
Features
Block Diagrams
SPI System Block Diagram
6
shows the SPI modules of two MCUs connected in a master-slave arrangement. The master
5
GENERATOR
SPI SHIFTER
MASTER
CLOCK
4
3
2
1
0
Figure 12-2. SPI System Connections
MC9S08GB/GT Data Sheet, Rev. 2.3
MOSI1
MISO1
SPSCK1
SS1
SPSCK1
MOSI1
MISO1
SS1
7
SLAVE
6
5
SPI SHIFTER
4
3
2
1
0
Features
189
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