M30262F6GP#U3 Renesas Electronics America, M30262F6GP#U3 Datasheet - Page 35
M30262F6GP#U3
Manufacturer Part Number
M30262F6GP#U3
Description
IC M16C/TINY MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M30262F4GPU3.pdf
(41 pages)
3.M30262F4GPU3.pdf
(241 pages)
Specifications of M30262F6GP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number:
M30262F6GP#U3M30262F6GP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30262F6GP#U3M30262F6GP#D5
Manufacturer:
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Quantity:
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Part Number:
M30262F6GP#U3M30262F6GP#U5
Manufacturer:
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Quantity:
10 000
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Processor Mode
Software wait
Table 1.7.1. Software waits and bus cycles
A software wait can be inserted by setting the wait bit (bit 7) of the processor mode register 1 (address
0005
A software wait is inserted in the internal ROM/RAM area by setting the wait bit of processor mode register
1. When set to "0", each bus cycle is executed in one BCLK cycle. When set to "1", each bus cycle is
executed in two BCLK cycles. After the microcomputer has been reset, this bit defaults to "0". When set to
"1", a wait is applied to all memory areas (two BCLK cycles). Set this bit after referring to the recommended
operating conditions (main clock input oscilliation frequecny) of the electrical characteristics.
The SFR area is always accessed in two BCLK cycles regardless of the setting of these control bits.
Table 1.7.1 shows the software wait and bus cycles.
Note: Before attempting to change the contents of the processor mode register 1, set bit 1 of the protect
register (address 000A
ROM/RAM
Internal
Area
16
) (Note) and bits 4 to 7 of the chip select control register (address 0008
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Wait bit
0
1
16
) to “1”.
1 BCLK cycle
2 BCLK cycles
Bus cycle
Renesas Technology Corp.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
).
M16C/26 Group
27
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