R5F21275SNFP#U0 Renesas Electronics America, R5F21275SNFP#U0 Datasheet - Page 132

IC R8C/27 MCU FLASH 32LQFP

R5F21275SNFP#U0

Manufacturer Part Number
R5F21275SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21275SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 12.2
12.1.5
Table 12.1
NOTES:
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer,
Oscillation stop detection,
Voltage monitor 1
Voltage monitor 2
Address break
(Reserved)
Reset
12.1.5.1
1. Do not use these interrupts. They are for use by development tools only.
2. For N, D version only.
There are 4 bytes in each vector. Set the starting address of an interrupt routine in each interrupt vector. When
an interrupt request is acknowledged, the CPU branches to the address set in the corresponding interrupt vector.
Figure 12.2 shows an Interrupt Vector.
The fixed vector tables are allocated addresses 0FFDCh to 0FFFFh.
Table 12.1 lists the Fixed Vector Tables. The vector addresses (H) of fixed vectors are used by the ID code
check function. For details, refer to 19.3 Functions to Prevent Rewriting of Flash Memory.
Interrupt Source
Sep 26, 2008
Interrupts and Interrupt Vectors
(1)
Vector address (H)
Fixed Vector Tables
Interrupt Vector
Fixed Vector Tables
Vector address (L)
(1)
(2)
,
Page 113 of 453
0FFDCh to 0FFDFh Interrupt on UND
0FFE0h to 0FFE3h
0FFE4h to 0FFE7h
0FFE8h to 0FFEBh
0FFECh to 0FFEFh
0FFF0h to 0FFF3h
0FFF4h to 0FFF7h
0FFF8h to 0FFFBh
0FFFCh to 0FFFFh
Address (L) to (H)
Vector Addresses
MSB
0 0 0 0
0 0 0 0
instruction
Interrupt on INTO
instruction
If the content of address
0FFE7h is FFh,
program execution
starts from the address
shown by the vector in
the relocatable vector
table.
Low address
Mid address
Remarks
High address
0 0 0 0
R8C/Tiny Series Software
Manual
12.4 Address Match
13. Watchdog Timer
10. Clock Generation Circuit
6. Voltage Detection Circuit
5. Resets
Interrupt
LSB
Reference
12. Interrupts

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