R5F21274JFP#U0 Renesas Electronics America, R5F21274JFP#U0 Datasheet - Page 287

• Manufacturer Part Number: R5F21274JFP#U0
• Description: MCU FLASH 2K FLASH 16K 32LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/27r

Specifications of R5F21274JFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 16.8
SS Transmit Data Register
SS Receive Data Register
b7 b6 b5
b7 b6 b5 b4
NOTE:
1. The SSRDR register retains the data reception before an overrun error occurs (ORER bit in the SSSR register set to
1 (overrun error)). When an overrun error occurs, the receive data may contain errors and therefore should be
discarded.
Sep 26, 2008
b4
b3
b3 b2 b1 b0
b2
Registers SSTDR and SSRDR
b1
b0
Store the transmit data.
The stored transmit data is transferred to the SSTRSR register and transmission is started
w hen it is detected that the SSTRSR register is empty.
When the next transmit data is w ritten to the SSTDR register during the data transmission from
the SSTRSR register, the data can be transmitted continuously.
When the MLS bit in the SSMR register is set to 1 (transfer data w ith LSB-first), the data in
w hich MSB and LSB are reversed is read, after w riting to the SSTDR register.
Store the receive data.
The receive data is transferred to the SSRDR register and the receive operation is completed
w hen 1 byte of data has been received by the SSTRSR register. At this time, the next receive
operation is possible. Continuous reception is possible using registers SSTRSR and SSRDR.
Symbol
SSTDR
Symbol
SSRDR
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Address
Address
00BEh
00BFh
Function
Function
16. Clock Synchronous Serial Interface
After Reset
After Reset
FFh
FFh
RW
RW
RW
RO