M38D59GCHP#U0 Renesas Electronics America, M38D59GCHP#U0 Datasheet - Page 67
M38D59GCHP#U0
Manufacturer Part Number
M38D59GCHP#U0
Description
IC 740/38D5 MCU QZ-ROM 80LQFP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet
1.M38D58G8FPU0.pdf
(144 pages)
Specifications of M38D59GCHP#U0
Core Processor
740
Core Size
8-Bit
Speed
12.5MHz
Connectivity
SIO, UART/USART
Peripherals
LCD, LED, PWM, WDT
Number Of I /o
59
Program Memory Size
48KB (48K x 8)
Program Memory Type
QzROM
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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38D5 Group
Rev.3.04
REJ03B0158-0304
Fig. 62 Clock generating circuit block diagram
Interrupt disable flag I
Interrupt request
On-chip oscillator
May 20, 2008 Page 65 of 134
X
X
IN
CIN
Q
Notes 1: When the X
S
R
(2)
Reset
CPUM2 BIT0
On-chip oscillator stop bit
X
oscillation stop bit
CPUM BIT5
X
IN
X
2: Although a feed-back resistor exists on-chip, an external
3: φSOURCE indicates the followings:
OUT
-X
COUT
STP instruction
switch bit to “1”.
•X
•On-chip oscillator divided by 4 in the on-chip oscillator mode
•Sub-clock in the low-speed mode
However, when used as the A/D conversion clock by the A/D converter,
φSOURCE indicates the followings:
•X
•On-chip oscillator divided by 4 in the low-speed or the on-chip oscillator mode
OUT
feed-back resistor may be needed depending on conditions.
IN
IN
“0”
“00”
“01”
“10”
1/4
input in the frequency/2, 4, or 8 mode
input in the frequency/2, 4, or 8 mode
Port Xc switch bit
CPUM BIT4
“11”
Main clock division
ratio selection bit
CPUM BIT7, 6
CIN
-X
1/2
“1”
COUT
“0”
instruction
Internal system clock selection bit
oscillation is selected as the system clock, set the port Xc
Internal system clock
selection bit
CPUM BIT3
1/2
Frequency divider
WIT
Main clock
division ratio
selection bit
φSOURCE
for Timer
“0”
“1”
1/2
(1)
S
R
“0”
(3)
Q
“1”
CPUM BIT6
Timer 1 count source
selection bits
“0”
“1”
“01”
“00”
Q
S
R
Timer 1
STP instruction
Timer 2 count source
selection bits
“00”
“10”
System clock φ
Timer 2
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