M38D59GCHP#U0 Renesas Electronics America, M38D59GCHP#U0 Datasheet - Page 83

• Manufacturer Part Number: M38D59GCHP#U0
• Description: IC 740/38D5 MCU QZ-ROM 80LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38D59GCHP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, LED, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

38D5 Group
Rev.3.04
REJ03B0158-0304
• Status Register
The status register shows the operating status of the flash
memory and whether erase operations and programs ended
successfully or in error. It can be read in the following ways:
(1) By reading an arbitrary address from the User ROM area
(2) By reading an arbitrary address from the User ROM area in
Also, the status register can be cleared by writing the clear status
register command (50
After reset, the status register is set to “80
Table 19 shows the status register. Each bit in this register is
explained below.
• Sequencer status (SR7)
The sequencer status indicates the operating status of the flash
memory. This bit is set to “0” (busy) during write or erase
operation and is set to “1” when these operations ends.
After power-on, the sequencer status is set to “1” (ready).
Table 19 Definition of each bit in status register
after writing the read status register command (70
the period from when the program starts or erase operation
starts to when the read array command (FF
Each bit of
SR7 (bit7)
SR6 (bit6)
SR5 (bit5)
SR4 (bit4)
SR3 (bit3)
SR2 (bit2)
SR1 (bit1)
SR0 (bit0)
SRD bits
May 20, 2008 Page 81 of 134
16
).
Sequencer status
Reserved
Erase status
Program status
Reserved
Reserved
Reserved
Reserved
Status name
16
”.
16
) is input.
16
)
• Erase status (SR5)
The erase status indicates the operating status of erase operation.
If an erase error occurs, it is set to “1”. When the erase status is
cleared, it is reset to “0”.
• Program status (SR4)
The program status indicates the operating status of write
operation.
When a write error occurs, it is set to “1”.
The program status is reset to “0” when it is cleared.
If “1” is written for any of the SR5 and SR4 bits, the read array,
program, and block erase commands are not accepted. Before
executing these commands, execute the clear status register
command (50
Also, if any commands are not correct, both SR5 and SR4 are set
to “1”.
Terminated in error
Terminated in error
Ready
16
“1”
−
−
−
−
−
) and clear the status register.
Definition
Terminated normally
Terminated normally
Busy
“0”
−
−
−
−
−