MC9S08GB60ACFUE Freescale Semiconductor, MC9S08GB60ACFUE Datasheet - Page 40
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MC9S08GB60ACFUE
Manufacturer Part Number
MC9S08GB60ACFUE
Description
IC MCU 60K FLASH 4K RAM 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08GT60ACFDER.pdf
(302 pages)
Specifications of MC9S08GB60ACFUE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08GB
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
8
Operating Supply Voltage
0 V to 1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
EM
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12 000
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MC9S08GB60ACFUE
Manufacturer:
FREESCAL
Quantity:
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Part Number:
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Manufacturer:
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MC9S08GB60ACFUE
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FREESCALE
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Company:
Part Number:
MC9S08GB60ACFUER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 3 Modes of Operation
clocks to the peripheral systems are halted to reduce power consumption. Refer to
Mode,”
system behavior in stop modes.
I/O Pins
Memory
ICG — In stop3 mode, the ICG enters its low-power standby state. Either the oscillator or the internal
reference may be kept running when the ICG is in standby by setting the appropriate control bit. In both
stop2 and stop1 modes, the ICG is turned off. Neither the oscillator nor the internal reference can be kept
running in stop2 or stop1, even if enabled within the ICG module.
TPM — When the MCU enters stop mode, the clock to the TPM1 and TPM2 modules stop. The modules
halt operation. If the MCU is configured to go into stop2 or stop1 mode, the TPM modules will be reset
upon wake-up from stop and must be reinitialized.
ATD — When the MCU enters stop mode, the ATD will enter a low-power standby state
operation will occur while in stop. If the MCU is configured to go into stop2 or stop1 mode, the ATD will
be reset upon wake-up from stop and must be reinitialized.
KBI — During stop3, the KBI pins that are enabled continue to function as interrupt sources that are
capable of waking the MCU from stop3. The KBI is disabled in stop1 and stop2 and must be reinitialized
after waking up from either of these modes.
RTI — During stop2 and stop3, the RTI continues to operate as an interrupt wakeup source. During stop1,
the RTI is disabled. In stop2, the RTI uses the internal 1 kHz RTI clock, but in stop3 mode, the RTI uses
either the external clock or the internal RTI clock. When the active BDM mode is enabled though, the
internal RTI clock is not operational.
SCI — When the MCU enters stop mode, the clocks to the SCI1 and SCI2 modules stop. The modules
halt operation. If the MCU is configured to go into stop2 or stop1 mode, the SCI modules will be reset
upon wake-up from stop and must be reinitialized.
SPI — When the MCU enters stop mode, the clocks to the SPI module stop. The module halts operation.
If the MCU is configured to go into stop2 or stop1 mode, the SPI module will be reset upon wake-up from
stop and must be reinitialized.
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All I/O pin states remain unchanged when the MCU enters stop3 mode.
If the MCU is configured to go into stop2 mode, all I/O pins states are latched before entering stop.
If the MCU is configured to go into stop1 mode, all I/O pins are forced to their default reset state
upon entry into stop.
All RAM and register contents are preserved while the MCU is in stop3 mode.
All registers will be reset upon wake-up from stop2, but the contents of RAM are preserved and
pin states remain latched until the PPDACK bit is written. The user may save any memory-mapped
register data into RAM before entering stop2 and restore the data upon exit from stop2.
All registers will be reset upon wake-up from stop1 and the contents of RAM are not preserved.
The MCU must be initialized as upon reset. The contents of the flash memory are nonvolatile and
are preserved in any of the stop modes.
Section 3.6.2, “Stop2
Mode,” and
MC9S08GB60A Data Sheet, Rev. 2
Section 3.6.3, “Stop3
Mode,” for specific information on
Section 3.6.1, “Stop1
Freescale Semiconductor
.
No conversion