DF2210CUNP24V Renesas Electronics America, DF2210CUNP24V Datasheet - Page 129
DF2210CUNP24V
Manufacturer Part Number
DF2210CUNP24V
Description
MCU 16BIT FLASH 3V 32K 64-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2218UTF24V.pdf
(758 pages)
Specifications of DF2210CUNP24V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2210CUNP24V
Manufacturer:
Renesas Electronics America
Quantity:
135
- Current page: 129 of 758
- Download datasheet (5Mb)
Note: * Supported only by the H8S/2218 Group.
Bit
7
6
5
4
3
2
1
0
Bit Name
–
–
INTM1
INTM0
NMIEG
MRESE
–
RAME
Initial Value R/W
0
0
0
0
0
0
0
1
R/W
–
R/W
R/W
R/W
R/W
–
R/W
Description
Reserved
The write value should always be 0.
Reserved
This bit is always read as 0 and cannot be modified.
These bits select the control mode of the interrupt
controller. For details of the interrupt control modes,
see section 5.6, Interrupt Control Modes and Interrupt
Operation.
00: Interrupt control mode 0
01: Setting prohibited
10: Interrupt control mode 2
11: Setting prohibited
NMI Edge Select
Selects the valid edge of the NMI interrupt input.
0: An interrupt is requested at the falling edge of NMI
1: An interrupt is requested at the rising edge of NMI
Manual Reset Select
Enables or disables the MRES pin* input.
0: Manual reset is disabled
1: Manual reset is enabled
The MRES input pin* can be used.
Reserved
This bit is always read as 0 and cannot be modified.
RAM Enable
Enables or disables the on-chip RAM. The RAME bit
is initialized when the reset status is released.
0: On-chip RAM is disabled
1: On-chip RAM is enabled
input
input
Rev.7.00 Dec. 24, 2008 Page 73 of 698
REJ09B0074-0700
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