DF2210CUNP24V Renesas Electronics America, DF2210CUNP24V Datasheet - Page 232
DF2210CUNP24V
Manufacturer Part Number
DF2210CUNP24V
Description
MCU 16BIT FLASH 3V 32K 64-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2218UTF24V.pdf
(758 pages)
Specifications of DF2210CUNP24V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2210CUNP24V
Manufacturer:
Renesas Electronics America
Quantity:
135
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Rev.7.00 Dec. 24, 2008 Page 176 of 698
REJ09B0074-0700
Bit Bit Name Initial Value R/W
3
2
1
0
DTIE1B
DTIE1A
DTIE0B
DTIE0A
0
0
0
0
R/W
R/W
R/W
R/W
Description
Data Transfer Interrupt Enable B
Enables or disables an interrupt to the CPU when transfer is
interrupted. If the DTIEB bit is set to 1 when DTME = 0, the
DMAC regards this as indicating a break in the transfer, and
issues a transfer break interrupt request to the CPU. A
transfer break interrupt can be canceled either by clearing the
DTIEB bit to 0 in the interrupt handling routine, or by
performing processing to continue transfer by setting the
DTME bit to 1.
Data Transfer Interrupt Enable 1B
Enables or disables the channel 1 transfer break interrupt.
0: Transfer break interrupt disabled
1: Transfer break interrupt enabled
Data Transfer End Interrupt Enable A
Enables or disables an interrupt to the CPU when transfer
ends. If the DTIEA bit is set to 1 when DTE = 0, the DMAC
regards this as indicating the end of a transfer, and issues a
transfer end interrupt request to the CPU. A transfer end
interrupt can be canceled either by clearing the DTIEA bit to 0
in the interrupt handling routine, or by performing processing
to continue transfer by setting the DTE bit to 1.
Data Transfer End Interrupt Enable 1A
Enables or disables the channel 1 transfer end interrupt.
0: Transfer end interrupt disabled
1: Transfer end interrupt enabled
Data Transfer Interrupt Enable 0B
Enables or disables the channel 0 transfer break interrupt.
0: Transfer break interrupt disabled
1: Transfer break interrupt enabled
Data Transfer End Interrupt Enable 0A
Enables or disables the channel 0 transfer end interrupt.
0: Transfer end interrupt disabled
1: Transfer end interrupt enabled
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