DF2210CUNP24V Renesas Electronics America, DF2210CUNP24V Datasheet - Page 242
DF2210CUNP24V
Manufacturer Part Number
DF2210CUNP24V
Description
MCU 16BIT FLASH 3V 32K 64-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2218UTF24V.pdf
(758 pages)
Specifications of DF2210CUNP24V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Price
Company:
Part Number:
DF2210CUNP24V
Manufacturer:
Renesas Electronics America
Quantity:
135
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7.4.5
In normal mode, transfer is performed with channels A and B used in combination. Normal mode
can be specified by setting the FAE bit in DMABCR to 1 and clearing the BLKE bit in DMACRA
to 0. In normal mode, MAR is updated after each byte or word transfer in response to a single
transfer request, and this is executed the number of times specified in ETCRA. The transfer source
is specified by MARA, and the transfer destination by MARB. Table 7.6 summarizes register
functions in normal mode.
Table 7.6
MARA and MARB specify the start addresses of the transfer source and transfer destination,
respectively, as 24 bits. MAR can be incremented or decremented by 1 or 2 each time a byte or
word is transferred, or can be fixed. Incrementing, decrementing, or holding a fixed value can be
set separately for MARA and MARB.
The number of transfers is specified by ETCRA as 16 bits. ETCRA is decremented each time a
transfer is performed, and when its value reaches H'0000 the DTE bit is cleared and transfer ends.
If the DTIE bit is set to 1 at this time, an interrupt request is sent to the CPU. The maximum
number of transfers, when H'0000 is set in ETCRA, is 65,536.
Rev.7.00 Dec. 24, 2008 Page 186 of 698
REJ09B0074-0700
Register
23
23
15
Normal Mode
ETCRA
MARA
MARB
Register Functions in Normal Mode
0
0
0
Function
Source address
register
Destination address
register
Transfer counter
Initial Setting
Start address of
transfer source
Start address of
transfer destination
Number of transfers Decremented every
Operation
Incremented/decremented
every transfer, or fixed
Incremented/decremented
every transfer, or fixed
transfer; transfer ends
when count reaches
H'0000
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