MCF51EM128CLK Freescale Semiconductor, MCF51EM128CLK Datasheet - Page 259
MCF51EM128CLK
Manufacturer Part Number
MCF51EM128CLK
Description
IC MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets
1.MCF51EM128CLL.pdf
(2 pages)
2.MCF51EM128CLL.pdf
(54 pages)
3.MCF51EM128CLL.pdf
(636 pages)
Specifications of MCF51EM128CLK
Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x16b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF51EM128CLK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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11.1.7
Key features of the ICS module are:
11.1.8
Figure 11-6
Freescale Semiconductor
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Frequency-locked loop (FLL) is trimmable for accuracy
Internal or external reference clocks can be used to control the FLL
Reference divider is provided for external clock
Internal reference clock has 9 trim bits available
Internal or external reference clocks can be selected as the clock source for the MCU
Whichever clock is selected as the source can be divided down
— 2-bit select for clock divider is provided
Control signals for a low power oscillator clock generator (OSCOUT) as the ICS external reference
clock are provided
— HGO, RANGE, EREFS, ERCLKEN, EREFSTEN
FLL Engaged Internal mode is automatically selected out of reset
BDC clock is provided as a constant divide by 2 of the low range DCO output
Three selectable digitally-controlled oscillators (DCO) optimized for different frequency ranges.
Option to maximize output frequency for a 32768 Hz external reference clock source.
– Allowable dividers are: 1, 2, 4, 8
Features
Block Diagram
is the ICS block diagram.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Internal Clock Source (ICS)
11-5
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