MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 1234

• Manufacturer Part Number: MC9S12XEQ512CAL
• Description: MCU 16BIT 512K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEQ512CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 32KB
• Cpu Speed: 50MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 25
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Appendix A Electrical Characteristics
The number of program/erase cycles for the EEPROM/D-Flash depends upon the partitioning of D-Flash
used for EEPROM Emulation. Defining RAM size allocated for EEE as EEE-RAM and D-Flash partition
allocated to EEE as EEE_NVM, the minimum number of program/erase cycles is specified depending
upon the ratio of EEE_NVM/EEE_RAM. The minimum ratio EEE_NVM/EEE_RAM =8.
1234
1
2
3
4
5
6
# K Cycles
(Log)
1,000,000
T
application.
Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25°C using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please
refer to Engineering Bulletin EB618
T
application.
This represents the number of writes of updated data words to the EEE_RAM partition. Minimum specification (endurance
and data retention) of the Emulated EEPROM array is based on the minimum specification of the D-Flash array per item 6.
This represents the number of writes of updated data words to the EEE_RAM partition. Typical endurance performance for
the Emulated EEPROM array is based on typical endurance performance and the EEE algorithm implemented on this
product family. Spec. table quotes typical endurance evaluated at 25°C for this product family.
This is equivalent to using a single byte or aligned word in the EEE_RAM with 32K D-Flash allocated for EEEPROM
Javg
Javg
100,000
10,000
1,000
does not exceed 85°C in a typical temperature profile over the lifetime of a consumer, industrial or automotive
does not exceed 85°C in a typical temperature profile over the lifetime of a consumer, industrial or automotive
100
10
10
Figure A-2. Program/Erase Dependency on D-Flash Partitioning
100
MC9S12XE-Family Reference Manual , Rev. 1.23
1000
10,000
100,000
EEE_NVM/EEE_RAM ratio
(Log)
20% Spec Cycles
10 Year Data Retention
Spec Cycles
5 Year Data Retention
Freescale Semiconductor