MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 148

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1. Read: Anytime.
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.54
2.3.55
148
Address 0x0261
Address 0x0262
Write:Never, writes to this register have no effect.
Field
Field
PTIH
PTH
PTH
Reset
Reset
7-0
1
0
W
W
R
R
Port H general purpose input/output data—Data Register
Port H pin 1 is associated with the TXD signal of the SCI6 module and the MOSI signal of the routed SPI1.
The routed SPI1 function takes precedence over the SCI6 and the general purpose I/O function if the routed SPI1
module is enabled. The SCI6 function takes precedence over the general purpose I/O function if the SCI6 is enabled.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port H general purpose input/output data—Data Register
Port H pin 0 is associated with the RXD signal of the SCI6 module and the MISO signal of the routed SPI1.
The routed SPI1 function takes precedence over the SCI6 and the general purpose I/O function if the routed SPI1
module is enabled. The SCI6 function takes precedence over the general purpose I/O function if the SCI6 is enabled.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port H input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
DDRH7
PTIH7
Port H Input Register (PTIH)
Port H Data Direction Register (DDRH)
u
0
7
7
= Unimplemented or Reserved
DDRH6
PTIH6
Table 2-49. PTH Register Field Descriptions (continued)
u
0
6
6
Figure 2-53. Port H Data Direction Register (DDRH)
Table 2-50. PTIH Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-52. Port H Input Register (PTIH)
DDRH5
PTIH5
u
0
5
5
DDRH4
PTIH4
u
0
4
4
Description
Description
u = Unaffected by reset
DDRH3
PTIH3
3
u
3
0
DDRH2
PTIH2
u
0
2
2
Access: User read/write
Freescale Semiconductor
DDRH1
PTIH1
u
0
1
1
Access: User read
DDRH0
PTIH0
u
0
0
0
(1)
(1)

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