MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 171

• Manufacturer Part Number: MC9S12XEQ512CAL
• Description: MCU 16BIT 512K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEQ512CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 32KB
• Cpu Speed: 50MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 25
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Always reads 0x00
1. Read: Anytime.
2.3.91
2.3.92
Freescale Semiconductor
Address 0x036E
Address 0x036F
PTRRR
PTRRR
Write: Unimplemented
Write: Anytime.
PPSR
Field
Field
Reset
Reset
7-0
7
6
W
W
R
R
Port R pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
PTRRR7
Port R routing—
This register configures the re-routing of the associated TIM channel.
1 TIMIOC7 is available on PP7
0 TIMIOC7 is available on PR7
Port R routing—
This register configures the re-routing of the associated TIM channel.
1 TIMIOC6 is available on PP6
0 TIMIOC6 is available on PR6
PIM Reserved Register
Port R Routing Register (PTRRR)
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
PTRRR6
0
0
0
6
6
Table 2-87. PTR Routing Register Field Descriptions
Figure 2-90. Port R Routing Register (PTRRR)
Table 2-86. PPSR Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
PTRRR5
Figure 2-89. PIM Reserved Register
0
0
0
5
5
PTRRR4
0
0
0
4
4
Description
Description
PTRRR3
3
0
0
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
PTRRR2
0
0
0
2
2
Access: User read/write
PTRRR1
0
0
0
1
1
Access: User read
PTRRR0
0
0
0
0
0
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