MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 199

no-image

MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12XEQ512CAL
Manufacturer:
FOCALTECH
Quantity:
1 100
Part Number:
MC9S12XEQ512CAL
Manufacturer:
FREESCALE
Quantity:
2 400
Part Number:
MC9S12XEQ512CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XEQ512CAL
Manufacturer:
FREESCALE
Quantity:
2 400
3.3.2.2
Read: Anytime. In emulation modes read operations will return the data read from the external bus. In all
other modes the data are read from this register.
Write: Only if a transition is allowed (see
directed to the external bus.
The MODE bits of the MODE register are used to establish the MCU operating mode.
Freescale Semiconductor
Address: 0x000B PRR
1. External signal (see
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
MODC,
Reset
MODB,
MODA
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
7–5
W
R
MODC
MODC
Mode Select Bits — These bits control the current operating mode during RESET high (inactive). The external
mode pins MODC, MODB, and MODA determine the operating mode during RESET low (active). The state of
the pins is latched into the respective register bits after the RESET signal goes inactive (see
Write restrictions exist to disallow transitions between certain modes.
changes. Attempting non authorized transitions will not change the MODE bits, but it will block further writes to
these register bits except in special modes.
Both transitions from normal single-chip mode to normal expanded mode and from emulation single-chip to
emulation expanded mode are only executed by writing a value of 3’b101 (write once). Writing any other value
will not change the MODE bits, but will block further writes to these register bits.
Changes of operating modes are not allowed when the device is secured, but it will block further writes to these
register bits except in special modes.
In emulation modes reading this address returns data from the external bus which has to be driven by the
emulator. It is therefore responsibility of the emulator hardware to provide the expected value (i.e. a value
corresponding to normal single chip mode while the device is in emulation single-chip mode or a value
corresponding to normal expanded mode while the device is in emulation expanded mode).
Mode Register (MODE)
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
1
Table
= Unimplemented or Reserved
MODB
MODB
3-3).
6
1
MC9S12XE-Family Reference Manual Rev. 1.23
Table 3-8. MODE Field Descriptions
MODA
Figure 3-4. Mode Register (MODE)
MODA
5
1
Figure
CAUTION
3-5). In emulation modes write operations will be also
0
0
4
Description
0
0
3
Chapter 3 Memory Mapping Control (S12XMMCV4)
Figure 3-5
2
0
0
illustrates all allowed mode
0
0
1
Figure
3-4).
0
0
0
199

Related parts for MC9S12XEQ512CAL