MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 468

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 10 XGATE (S12XGATEV3)
START_XGATE
DUMMY_ISR
XGATE_DATA_FLASH
XGATE_DATA_SCI
XGATE_DATA_IDX
XGATE_DATA_MSG
XGATE_CODE_FLASH
XGATE_CODE_DONE
XGATE_CODE_FLASH_END
XGATE_DUMMY_ISR_XG
10.9.3
To simplify the implementation of a program stack the XGATE can be configured to set RISC core register
R7 to the beginning of a stack region before executing a thread. Two separate stack regions can be defined:
One for threads of priority level 7 to 4 (refer to
468
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Stack Support
MOVW 2,X+, 2,Y+
MOVW 2,X+, 2,Y+
MOVW 2,X+, 2,Y+
CPX
BLS
;###########################################
;#
;###########################################
MOVW #XGMCTL_ENABLE, XGMCTL
BRA
;###########################################
;#
;###########################################
RTI
CPU
;###########################################
;#
;###########################################
ALIGN 1
EQU
EQU
DW
EQU
DB
EQU
FCC
DB
;###########################################
;#
;###########################################
ALIGN 1
LDW
LDB
LDB
STB
LDB
STB
CMPL R4,#$0D
BEQ
RTS
LDL
STB
LDL
STB
RTS
EQU
MC9S12XE-Family Reference Manual , Rev. 1.23
#XGATE_CODE_FLASH_END
COPY_XGATE_CODE_LOOP
*
XGATE
*
*-XGATE_DATA_FLASH
SCI_REGS
*-XGATE_DATA_FLASH
XGATE_DATA_MSG
*-XGATE_DATA_FLASH
"Hello World!
$0D
R2,(R1,#XGATE_DATA_SCI)
R3,(R1,#XGATE_DATA_IDX)
R4,(R1,R3+)
R3,(R1,#XGATE_DATA_IDX)
R0,(R2,#(SCISR1-SCI_REGS))
R4,(R2,#(SCIDRL-SCI_REGS))
XGATE_CODE_DONE
R4,#$00
R4,(R2,#(SCICR2-SCI_REGS))
R3,#XGATE_DATA_MSG;reset R3
R3,(R1,#XGATE_DATA_IDX)
(XGATE_CODE_FLASH_END-XGATE_CODE_FLASH)+XGATE_CODE_XG
DUMMY INTERRUPT SERVICE ROUTINE
START XGATE
XGATE CODE
XGATE DATA
Section 10.3.1.5, “XGATE Initial Stack Pointer for
;enable XGATE
;pointer to SCI register space
;string pointer
;ASCII string
;CR
;SCI -> R2
;msg -> R3
;curr. char -> R4
;R3 -> idx
;initiate SCI transmit
;initiate SCI transmit
;disable SCI interrupts
#
#
#
#
Freescale Semiconductor

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