MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 509

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Freescale Semiconductor
Address
0x000C
0x000D
0x001C
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000A
0x000B
0x000E ATDCMPHTH
0x000F ATDCMPHTL
0x0010
0x0012
0x0014
0x0016
0x0018
0x001A
0x001E
0x0020
0x0022
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
ATDCMPEH
ATDSTAT2H
ATDCMPEL
ATDSTAT2L
ATDDIENH
ATDSTAT0
ATDDIENL
ATDCTL3
ATDCTL4
ATDCTL5
Unimple-
ATDDR0
ATDDR1
ATDDR2
ATDDR3
ATDDR4
ATDDR5
ATDDR6
ATDDR7
ATDDR8
ATDDR9
mented
Name
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Figure 13-2. ADC12B16C Register Summary (Sheet 2 of 3)
SMP2
Bit 7
DJM
SCF
0
0
MC9S12XE-Family Reference Manual Rev. 1.23
= Unimplemented or Reserved
SMP1
S8C
SC
and
and
and
and
and
and
and
and
and
and
6
0
0
See
See
See
See
See
See
See
See
See
See
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
ETORF
SCAN
SMP0
S4C
5
0
FIFOR
MULT
S2C
4
0
CMPHT[15:8]
CMPE[15:8]
CMPHT[7:0]
CMPE[7:0]
CCF[15:8]
IEN[15:8]
CCF[7:0]
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
IEN[7:0]
CC3
S1C
CD
3
0
PRS[4:0]
FIFO
CC2
CC
2
0
FRZ1
CC1
CB
1
0
FRZ0
Bit 0
CC0
CA
0
509

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