MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 543

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Note: in
IOSx is the register TIOS bit x,
OC7Mx is the register OC7M bit x,
TCx is timer Input Capture/Output Compare register,
IOCx is channel x,
OMx/OLx is the register TCTL1/TCTL2,
OC7Dx is the register OC7D bit x.
IOCx = OC7Dx+ OMx/OLx, means that both OC7 event and OCx event will change channel x value.
14.3.2.9
Read or write: Anytime
All bits reset to zero.
Freescale Semiconductor
Module Base + 0x000A
Module Base + 0x000B
IOCx=OC7Dx
IOC7=OM7/O
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
TC7=TCx
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
L7
W
W
R
R
Table
OC7Mx=1
EDG7B
EDG3B
Timer Control Register 3/Timer Control Register 4 (TCTL3/TCTL4)
0
0
7
7
IOCx=OC7Dx
IOC7=OM7/O
14-11,the IOS7 and IOSx should be set to 1
+OMx/OLx
TC7>TCx
L7
OC7M7=0
EDG7A
EDG3A
0
0
6
6
TC7=TCx
Figure 14-13. Timer Control Register 3 (TCTL3)
Figure 14-14. Timer Control Register 4 (TCTL4)
Table 14-11. The OC7 and OCx event priority
MC9S12XE-Family Reference Manual Rev. 1.23
IOC7=OM7/OL7
IOCx=OMx/OLx
OC7Mx=0
EDG6B
EDG2B
5
0
5
0
TC7>TCx
EDG6A
EDG2A
0
0
4
4
IOC7=OC7D7
IOCx=OC7Dx
TC7=TCx
EDG5B
EDG1B
OC7Mx=1
0
0
3
3
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
IOCx=OC7Dx
IOC7=OC7D7
+OMx/OLx
TC7>TCx
EDG5A
EDG1A
OC7M7=1
2
0
2
0
TC7=TCx
EDG4B
EDG0B
IOCx=OMx/OLx
IOC7=OC7D7
0
0
1
1
OC7Mx=0
TC7>TCx
EDG4A
EDG0A
0
0
0
0
543

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