MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 582

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 15 Inter-Integrated Circuit (IICV3) Block Description
15.1.2
The IIC functions the same in normal, special, and emulation modes. It has two low power modes: wait
and stop modes.
15.1.3
The block diagram of the IIC module is shown in
15.2
The IICV3 module has two external pins.
15.2.1
This is the bidirectional serial clock line (SCL) of the module, compatible to the IIC bus specification.
15.2.2
This is the bidirectional serial data line (SDA) of the module, compatible to the IIC bus specification.
582
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
General Call Address detection
Compliant to ten-bit address
External Signal Description
Modes of Operation
Block Diagram
IIC_SCL — Serial Clock Line Pin
IIC_SDA — Serial Data Line Pin
Interrupt
bus_clock
IIC
MC9S12XE-Family Reference Manual , Rev. 1.23
Registers
Figure 15-1. IIC Block Diagram
Clock
Control
Figure
Start
Stop
Arbitration
Control
Compare
Address
15-1.
In/Out
Data
Shift
Register
Freescale Semiconductor
SCL
SDA

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