MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 822

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 23 Voltage Regulator (S12VREGL3V3V1)
23.3.1
A summary of the registers associated with the VREG_3V3 sub-block is shown in
descriptions of the registers and bits are given in the subsections that follow
23.3.2
This section describes all the VREG_3V3 registers and their individual bits.
23.3.2.1
The VREGHTCL register allows to configure the VREG temperature sense features.
822
0x02F0
Address
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
0x02F0
0x02F1
0x02F2
0x02F3
0x02F4
0x02F5
0x02F6
0x02F7
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
R
VREGHTTR
VREGHTCL
VREGCTRL
VREGAPIC
VREGAPIR
VREGAPIR
VREGAPIT
Reserved
Module Memory Map
Register Descriptions
Name
H
0
0
7
06
R
H
L
L
igh
T
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
emperature
APICLK
APITR5
APIR15
HTOEN
= Unimplemented or Reserved
APIR7
0
0
6
Bit 7
0
0
0
MC9S12XE-Family Reference Manual , Rev. 1.23
APITR4
APIR14
APIR6
VSEL
Figure 23-2. Register Summary
5
0
6
0
0
0
0
0
Control Register (VREGHTCL)
APITR3
APIR13
APIR5
VSEL
5
0
0
0
0
VAE
1
4
APIFES
APITR2
APIR12
APIR4
VAE
4
0
0
0
HTEN
0
3
APITR1
APIR11
HTTR3
APIEA
APIR3
HTEN
3
0
0
HTDS
2
0
APITR0
APIR10
HTTR2
APIFE
APIR2
HTDS
LVDS
2
0
Figure
Freescale Semiconductor
HTIE
0
1
HTTR1
APIR9
APIR1
HTIE
APIE
LVIE
1
0
0
23-2. Detailed
HTTR0
HTIF
APIR8
APIR0
HTIF
APIF
Bit 0
LVIF
0
0
0
0

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