MC908LJ24CFUE Freescale Semiconductor, MC908LJ24CFUE Datasheet - Page 355

IC MCU 24K FLASH 8MHZ SPI 64-QFP

MC908LJ24CFUE

Manufacturer Part Number
MC908LJ24CFUE
Description
IC MCU 24K FLASH 8MHZ SPI 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
40
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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17.5.1 LCD Duty
17.5.2 LCD Voltages (V
17.5.3 LCD Cycle Frame
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
The setting of the LCD output waveform duty is dependent on the
number of backplane drivers required. Three LCD duties are available:
When the LCD driver module is enabled the backplane waveforms for
the selected duty are driven out of the backplane pins. The backplane
waveforms are periodic and are shown are shown in
Figure
The voltage V
V
waveforms. They are derived from V
Figure
The relative potential of the LCD voltages are:
The V
bits, LCCON[2:0].
The LCD driver module uses the CGMXCLK (see
(OSC))as the input reference clock. This clock is divided to produce the
LCD waveform base clock, LCDCLK, by configuring the LCLK[2:0] bits
in the LCD clock register. The LCDCLK clocks the backplane and the
frontplane output waveforms.
LCD2
LCD,
LCD3
Static duty — BP0 is used only
1/3 duty — BP0, BP1, and BP3 are used
1/4 duty — BP0, BP1, BP2, and BP3 are used
V
, and V
V
V
V
V
17-6, and
17-3).
LCD1,
LCD
LCD1
LCD2
LCD3
Liquid Crystal Display (LCD) Driver
bias voltage, V
= V
= 2/3 × (V
= 1/3 × (V
= V
V
LCD3
LCD
LCD2
DD
bias
Figure
is from the V
are internal bias voltages for the LCD driver
, V
LCD3
LCD
LCD
17-7.
bias
)
– V
– V
, is controlled by the LCD contrast control
LCD
bias
bias
)
)
pin and must not exceed V
LCD
using a resistor ladder (see
Liquid Crystal Display (LCD) Driver
Section 7. Oscillator
Functional Description
Figure
DD
17-5,
Data Sheet
. V
LCD1
355
,

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