MC68HC705C9ACFBE Freescale Semiconductor, MC68HC705C9ACFBE Datasheet - Page 102

IC MCU 8BIT 44-QFP

MC68HC705C9ACFBE

Manufacturer Part Number
MC68HC705C9ACFBE
Description
IC MCU 8BIT 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C9ACFBE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Processor Series
HC705C
Core
HC05
Data Bus Width
8 bit
Data Ram Size
352 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
31
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Package
44PQFP
Family Name
HC05
Maximum Speed
2.1 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705C9ACFBE
Manufacturer:
FREESCALE
Quantity:
1 827
Part Number:
MC68HC705C9ACFBE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical Specifications
12.9 5.0-Vdc Serial Peripheral Interface Timing
102
1. V
2. Signal production depends on software.
3. Assumes 200 pF load on all SPI pins.
No.
10
11
12
13
1
2
3
4
5
6
7
8
9
DD
= 5.0 Vdc ± 10%; V
Operating frequency
Cycle time
Enable lead time
Enable lag time
Clock (SCK) high time
Clock (SCK) low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time (time to data active from
high-impedance state)
Slave disable time (hold time to high-impedance state)
Data valid
Data hold time (outputs)
Rise time (20% V
Fall time (70% V
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master (before capture edge)
Slave (after enable edge)
Master (after capture edge)
slave (After Enable Edge)
SPI outputs (SCK, MOSI, and MISO)
SPI inputs (SCK, MOSI, MISO, and SS)
SPI outputs (SCK, MOSI, and MISO)
SPI inputs (SCK, MOSI, MISO, and SS)
DD
DD
SS
to 20% V
to 70% V
= 0 Vdc, T
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Characteristic
(3)
DD
DD
, C
A
, C
= –40 to +85°C, unless otherwise noted. Refer to
L
L
= 200 pF)
= 200 pF)
(1)
t
Symbol
t
t
t
W
t
W
W
t
W
t
t
t
t
LEAD
LEAD
f
t
t
f
CYC
t
t
CYC
LAG
LAG
(
(
(
OP
(
t
t
t
HO
OP
SU
SU
t
HO
SCKH
SCKH
SCKL
t
SCKL
H
V
t
t
t
H
V
t
DIS
t
RM
FM
RS
FS
(
(
(
(
A
(
(
(
(
M
M
S
(
(
S
(
M
(
(
(
M
S
S
M
S
(
(
M
M
S
S
)
)
)
)
M
S
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
M
M
S
S
Figure 12-9
0.25
0.25
Min
480
240
720
340
190
340
190
100
100
100
100
2.0
dc
dc
(2)
(2)
0
0
Freescale Semiconductor
and
Max
Figure
120
240
240
100
100
0.5
2.1
2.0
2.0
12-10.
t
t
MHz
CYC
CYC
Unit
t
f
CYC
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
µs
OP
(
(
M
M
)
)

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